Re: [PATCH] arm64: dts: qcom: lemans: Add OPP-table for ICE UFS device node

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Mismatch between OPP node name `opp-75000000` and its `opp-hz` value, incorrectly specifying 750 MHz instead of 75 MHz.
--

commit 7df0ac8d5186b38efd03084ecec240e439760d84
Author: Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>

arm64: dts: qcom: lemans: Add OPP-table for ICE UFS device node

This commit adds an optional OPP-table for the Inline Crypto Engine (ICE) UFS
device nodes on the Qualcomm LeMans platform. It defines the operating points
by specifying required clock frequencies and their corresponding power domain
performance states.

> diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
> --- a/arch/arm64/boot/dts/qcom/lemans.dtsi
> +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi

[ ... ]

> @@ -3109,6 +3109,32 @@ ice: crypto@1d88000 {
>  			clock-names = "core",
>  				      "iface";
>  			power-domains = <&gcc UFS_PHY_GDSC>;
> +
> +			operating-points-v2 = <&ice_opp_table>;
> +
> +			ice_opp_table: opp-table {
> +				compatible = "operating-points-v2";
> +
> +				opp-75000000 {
> +					opp-hz = /bits/ 64 <750000000>;

[Severity: High]
Does this opp-hz value have an extra zero? 

The node name is opp-75000000, but the frequency specified is 750000000 
(750 MHz) instead of 75 MHz. Requesting a 750 MHz clock frequency at the 
rpmhpd_opp_svs_l1 low power state could potentially cause clock scaling 
failures or hardware instability for the ICE block.

> +					required-opps = <&rpmhpd_opp_svs_l1>;
> +				};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527-add-opp-table-for-lemans-ice-ufs-v1-1-3f97f5ce60db@oss.qualcomm.com?part=1