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The controller is similar to previous generations, but the register fields are widened, the depth is made configurable, and the enable bit moves to a different spot. This series adds only basic support with fixed depth -- configurable depth will come later. Patch 1 adds device tree bindings for Tegra264 PWM (compatible string). Patch 2 prefixes driver-local macros and static helpers with tegra_/TEGRA_ to make their scoping clear. Patches 3 to 6 contain the PWM driver changes for Tegra264. Patch 7 adds device tree nodes for the PWM controllers on Tegra264. Thanks, Mikko --- Changes in v5: - New patch: prefix driver-local macros and static helpers with tegra_/TEGRA_ (suggested by Uwe) - Squashed the enable_reg parameterization into the "Add support for Tegra264" patch - Rename pwm_readl()/pwm_writel() parameter `dev` to `pwm` to match the rest of the driver - Drop an extra blank line in tegra_pwm_enable() - Reflow the code comment text in "Add support for Tegra264" to fit within 80 columns - Dropped duty_width field since it was unused. - Rebased on latest -next. - Link to v4: https://lore.kernel.org/r/20260331-t264-pwm-v4-0-c041659677cf@nvidia.com Changes in v4: - Use ULONG_MAX rather than S64_MAX to avoid overflow on 32-bit platforms - Link to v3: https://lore.kernel.org/r/20260330-t264-pwm-v3-0-5714427d5976@nvidia.com Changes in v3: - Fixed device tree binding patch. - Picked up trailers. - Link to v2: https://lore.kernel.org/r/20260325-t264-pwm-v2-0-998d885984b3@nvidia.com Changes in v2: - Added device tree binding and Tegra264 device tree patches by Thierry. - Link to v1: https://lore.kernel.org/r/20260323-t264-pwm-v1-0-4c4ff743050f@nvidia.com --- Mikko Perttunen (4): pwm: tegra: Prefix driver-local macros and functions pwm: tegra: Modify read/write accessors for multi-register channel pwm: tegra: Parametrize duty and scale field widths pwm: tegra: Add support for Tegra264 Thierry Reding (2): dt-bindings: pwm: Document Tegra264 controller arm64: tegra: Add PWM controllers on Tegra264 Yi-Wei Wang (1): pwm: tegra: Avoid hard-coded max clock frequency .../bindings/pwm/nvidia,tegra20-pwm.yaml | 1 + arch/arm64/boot/dts/nvidia/tegra264.dtsi | 72 ++++++++++ drivers/pwm/pwm-tegra.c | 155 ++++++++++++++------- 3 files changed, 176 insertions(+), 52 deletions(-) --- base-commit: f7af91adc230aa99e23330ecf85bc9badd9780ad change-id: 20260303-t264-pwm-57e10d039df1