Re: [PATCH net v2] dt-bindings: ethernet: eswin: fix hsp-sp-csr backward compatibility

[Rob Herring <robh@kernel.org>]

On Mon, Jun 01, 2026 at 11:28:52AM +0800, lizhi2@eswincomputing.com wrote:
> From: Zhi Li <lizhi2@eswincomputing.com>
> 
> c36069c6f46c added two optional cells to eswin,hsp-sp-csr, but
> omitted minItems: 4.

Please run checkpatch.pl and fix the issue it reports with the commit 
reference.

> 
> As a result, dt-schema implicitly required all 6 cells, which
> broke backward compatibility with existing 4-cell device trees.
> 
> Add minItems: 4 to preserve backward compatibility.
> 
> Fixes: c36069c6f46c ("dt-bindings: ethernet: eswin: add optional TXD and RXD delay register offsets")
> Reported-by: Sashiko AI <sashiko-bot@kernel.org>
> Closes: https://lore.kernel.org/all/20260519022334.35742C2BCB7@smtp.kernel.org/
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
> Signed-off-by: Zhi Li <lizhi2@eswincomputing.com>
> ---
> Changes in v2:
>   - Reference c36069c6f46c explicitly instead of "previous change".
>   - Improve commit message formatting and line wrapping.
>   - No functional change.
>   - Link to v1:
>     https://lore.kernel.org/lkml/20260525052441.1637-1-lizhi2@eswincomputing.com/
> ---
>  Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml b/Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml
> index b66ae6300faf..65882ff79d8d 100644
> --- a/Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml
> +++ b/Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml
> @@ -84,7 +84,8 @@ properties:
>        This reference is provided for background information only.
>      $ref: /schemas/types.yaml#/definitions/phandle-array
>      items:
> -      - items:
> +      - minItems: 4
> +        items:
>            - description: Phandle to HSP(High-Speed Peripheral) device
>            - description: Offset of phy control register for internal
>                           or external clock selection
> -- 
> 2.25.1
> 
>