Devicetree
 help / color / mirror / Atom feed
From: sashiko-bot@kernel.org
To: "George Moussalem via B4 Relay"
	<devnull+george.moussalem.outlook.com@kernel.org>
Cc: devicetree@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH 3/3] net: phy: qca,at803x: add RX and TX clock management for IPQ5018 PHY
Date: Tue, 02 Jun 2026 13:19:22 +0000	[thread overview]
Message-ID: <20260602131922.DBF3C1F0089A@smtp.kernel.org> (raw)
In-Reply-To: <20260601-ipq5018-gephy-clocks-v1-3-2df8287712c3@outlook.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Unbalanced clock reference counting causing CCF underflow warnings
--

commit 05a5fab6d0a0c9ba1c5e411c7e94bc9ff8040850
Author: George Moussalem <george.moussalem@outlook.com>

net: phy: qca,at803x: add RX and TX clock management for IPQ5018 PHY

This patch acquires and enables the RX and TX clocks for the IPQ5018
PHY datapath. It also gates these clocks upon link state changes to
improve power management.

> diff --git a/drivers/net/phy/qcom/at803x.c b/drivers/net/phy/qcom/at803x.c
> index 63726cf98cd42..b7361a14220d8 100644
> --- a/drivers/net/phy/qcom/at803x.c
> +++ b/drivers/net/phy/qcom/at803x.c

[ ... ]

> @@ -1062,6 +1065,16 @@ static int ipq5018_config_init(struct phy_device *phydev)
>  
>  static void ipq5018_link_change_notify(struct phy_device *phydev)
>  {
> +	struct ipq5018_priv *priv = phydev->priv;
> +
> +	if (phydev->link) {
> +		clk_enable(priv->rx_clk);
> +		clk_enable(priv->tx_clk);
> +	} else {
> +		clk_disable(priv->rx_clk);
> +		clk_disable(priv->tx_clk);
> +	}
> +

[Severity: High]
Will this lead to unbalanced clock reference counts and Common Clock
Framework (CCF) underflow warnings?

Because ipq5018_link_change_notify() is invoked on every PHY state
transition, it can be called multiple times consecutively while
phydev->link remains false (for example, transitioning from PHY_NOLINK
to PHY_HALTED). This would result in multiple calls to clk_disable()
without corresponding clk_enable() calls.

>  	/*
>  	 * Reset the FIFO buffer upon link disconnects to clear any residual data
>  	 * which may cause issues with the FIFO which it cannot recover from.

[ ... ]

> @@ -1084,6 +1097,16 @@ static int ipq5018_probe(struct phy_device *phydev)
>  	priv->set_short_cable_dac = of_property_read_bool(dev->of_node,
>  							  "qcom,dac-preset-short-cable");
>  
> +	priv->rx_clk = devm_clk_get_enabled(dev, "rx");
> +	if (IS_ERR(priv->rx_clk))
> +		return dev_err_probe(dev, PTR_ERR(priv->rx_clk),
> +				     "failed to get and enable RX clock\n");
> +

[Severity: High]
If the driver unbinds while the link is down, won't the unconditional
cleanup registered by devm_clk_get_enabled() trigger another CCF
underflow warning?

The initial devm_clk_get_enabled() sets the enable count to 1. If the
link goes down, the count drops to 0. When devres cleans up on unbind,
it will attempt to disable the clock again. Should state tracking be
added, or should this use devm_clk_get() instead if the clock state
is going to be managed dynamically?

> +	priv->tx_clk = devm_clk_get_enabled(dev, "tx");
> +	if (IS_ERR(priv->tx_clk))
> +		return dev_err_probe(dev, PTR_ERR(priv->tx_clk),
> +				     "failed to get and enable TX clock\n");
> +

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260601-ipq5018-gephy-clocks-v1-0-2df8287712c3@outlook.com?part=3

      reply	other threads:[~2026-06-02 13:19 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-01 13:19 [PATCH 0/3] IPQ5018: Add and enable GEPHY RX and TX clocks George Moussalem via B4 Relay
2026-06-01 13:19 ` [PATCH 1/3] dt-bindings: net: qca,ipq5018: Split IPQ5018 PHY bindings from ar803x George Moussalem via B4 Relay
2026-06-01 17:45   ` Rob Herring (Arm)
2026-06-01 20:49     ` Rob Herring
2026-06-02  6:54       ` George Moussalem
2026-06-02 13:19   ` sashiko-bot
2026-06-01 13:19 ` [PATCH 2/3] arm64: qcom: ipq5018: Add GEPHY RX and TX clocks George Moussalem via B4 Relay
2026-06-02 13:19   ` sashiko-bot
2026-06-01 13:19 ` [PATCH 3/3] net: phy: qca,at803x: add RX and TX clock management for IPQ5018 PHY George Moussalem via B4 Relay
2026-06-02 13:19   ` sashiko-bot [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260602131922.DBF3C1F0089A@smtp.kernel.org \
    --to=sashiko-bot@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=devnull+george.moussalem.outlook.com@kernel.org \
    --cc=robh@kernel.org \
    --cc=sashiko-reviews@lists.linux.dev \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox