[PATCH 1/2] dt-bindings: phy: qcom,usb-hs-phy: add qcom,vendor-init-seq

[Herman van Hazendonk <github.com@herrie.org>]

Add an optional "qcom,vendor-init-seq" property carrying raw ULPI
(address, value) pairs that are written after PHY reset.

Unlike the existing "qcom,init-seq" property, the address field is
NOT offset by ULPI_EXT_VENDOR_SPECIFIC, so the new property can
reach the standard ULPI vendor register range (0x30-0x3f). MSM8x60-
class hardware needs this range to programme pre-emphasis, HS driver
slope and CDR auto-reset bits the legacy msm_otg driver used to set
via platform data.

The "qcom,init-seq" path is left unchanged.

Signed-off-by: Herman van Hazendonk <github.com@herrie.org>
---
 .../devicetree/bindings/phy/qcom,usb-hs-phy.yaml   | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.yaml
index e03b516c698c..b9eca670419a 100644
--- a/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.yaml
@@ -85,6 +85,20 @@ properties:
             the address is offset from the ULPI_EXT_VENDOR_SPECIFIC address
         - description: value
 
+  qcom,vendor-init-seq:
+    $ref: /schemas/types.yaml#/definitions/uint8-array
+    description: >
+      Flat sequence of raw ULPI address/value byte pairs written after
+      the PHY reset. Each pair is two consecutive bytes:
+      [addr0, val0, addr1, val1, ...]. Total length must be even and
+      no more than 64 bytes (32 pairs). Unlike qcom,init-seq the
+      address field is not offset by ULPI_EXT_VENDOR_SPECIFIC, so this
+      property can reach the standard ULPI vendor range (0x30-0x3f) —
+      used on MSM8x60-class hardware to program pre-emphasis, HS
+      driver slope and CDR auto-reset bits the legacy msm_otg driver
+      used to set via platform data.
+    maxItems: 64
+
 required:
   - clocks
   - clock-names
-- 
2.43.0