Re: [PATCH 4/7] dt-bindings: timer: Add RISC-V ACLINT bindings

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Low] The `reg` property erroneously allows up to 4095 items, undermining schema validation.
- [Low] The `interrupts-extended` property is missing from the `required` list, weakening schema validation.
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commit 173c98f19d28214c8c437b5b2fe1fe7ffd581f01
Author: Joel Stanley <joel@jms.id.au>

dt-bindings: timer: Add RISC-V ACLINT bindings

This commit documents the device tree bindings for the RISC-V Advanced Core
Local Interruptor (ACLINT). It defines the memory-mapped devices providing
IPI and timer functionalities for each HART on a multi-HART platform.

> diff --git a/Documentation/devicetree/bindings/timer/riscv,aclint-mtimer.yaml b/Documentation/devicetree/bindings/timer/riscv,aclint-mtimer.yaml
> new file mode 100644
> index 0000000000000..192ff3fcf79f3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/riscv,aclint-mtimer.yaml
[ ... ]
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - tenstorrent,atlantis-aclint
> +          - qemu,aclint-mtimer
> +      - const: riscv,aclint-mtimer
> +
> +  reg:
> +    minItems: 1
> +    maxItems: 4095

[Severity: Low]
Is this maxItems limit of 4095 correct for the reg property?

It appears this might be a copy-paste from the interrupts-extended property.
Since the RISC-V ACLINT MTIMER typically has only 1 or 2 memory-mapped
regions (e.g., for mtimecmp and mtime), allowing up to 4095 items could
permit incorrect device tree definitions to silently pass schema validation.

> +
> +  interrupts-extended:
> +    minItems: 1
> +    maxItems: 4095
> +
> +required:
> +  - compatible
> +  - reg
> +
> +unevaluatedProperties: false

[Severity: Low]
Should interrupts-extended be added to this required list?

Since the primary purpose of the ACLINT MTIMER is to generate machine-level
timer interrupts for harts, omitting the interrupt routing from the required
list might allow incomplete, non-functional hardware descriptions to pass
validation. Other similar bindings typically mandate interrupt routing
properties.

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Sashiko AI review · https://sashiko.dev/#/patchset/20260603074222.593243-1-joel@jms.id.au?part=4