Devicetree
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From: sashiko-bot@kernel.org
To: "Stefano Radaelli" <stefano.radaelli21@gmail.com>
Cc: Frank.Li@kernel.org, robh@kernel.org, conor+dt@kernel.org,
	imx@lists.linux.dev, devicetree@vger.kernel.org
Subject: Re: [PATCH v1 02/12] arm64: dts: imx8mp-var-som-symphony: enable USB support
Date: Wed, 03 Jun 2026 12:14:21 +0000	[thread overview]
Message-ID: <20260603121421.852C01F00893@smtp.kernel.org> (raw)
In-Reply-To: <36b7fad5b7cc932f502449cf4082e57f732e8bb2.1780487415.git.stefano.r@variscite.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Incorrect interrupt polarity configured for the PTN5150 Type-C controller's INTB pin.
--

commit 29e658d004cef4b6d7125b61dc6adb4519ddc922
Author: Stefano Radaelli <stefano.r@variscite.com>

arm64: dts: imx8mp-var-som-symphony: enable USB support

This commit enables the USB controllers on the Symphony carrier board. It
adds the PTN5150 Type-C controller, configures the I2C bus, and enables the
USB3 PHYs and controllers with their respective roles.

> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts b/arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts
> index 25f707012f62c..de1b8b8428481 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts

[ ... ]

> @@ -95,6 +98,22 @@ usb3-sata-sel-hog {
>  			line-name = "usb3_sata_sel";
>  		};
>  	};
> +
> +	/* USB Type-C Controller */
> +	typec@3d {
> +		compatible = "nxp,ptn5150";
> +		reg = <0x3d>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_ptn5150>;
> +		interrupt-parent = <&gpio1>;
> +		interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;

[Severity: Low]
Does this incorrectly describe the interrupt polarity for the PTN5150?

The PTN5150 INTB interrupt pin is an active-low, open-drain output, which
would typically use IRQ_TYPE_LEVEL_LOW or IRQ_TYPE_EDGE_FALLING.

While the extcon-ptn5150 driver currently hardcodes IRQF_TRIGGER_FALLING
when requesting the IRQ (masking the issue functionally by overriding the
devicetree), specifying IRQ_TYPE_LEVEL_HIGH violates hardware description
standards. This mismatch could lead to trigger mismatch warnings during boot
or future bugs if the driver is ever updated to use the devicetree specified
trigger type.

> +
> +		port {
> +			typec_dr_sw: endpoint {
> +				remote-endpoint = <&usb3_drd_sw>;
> +			};
> +		};
> +	};
>  };

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/cover.1780487415.git.stefano.r@variscite.com?part=2

  reply	other threads:[~2026-06-03 12:14 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-03 11:55 [PATCH v1 00/12] arm64: dts: imx8mp-var-som-symphony: align DTS with hardware revision Stefano Radaelli
2026-06-03 11:55 ` [PATCH v1 01/12] arm64: dts: imx8mp-var-som-symphony: add input keys Stefano Radaelli
2026-06-03 11:55 ` [PATCH v1 02/12] arm64: dts: imx8mp-var-som-symphony: enable USB support Stefano Radaelli
2026-06-03 12:14   ` sashiko-bot [this message]
2026-06-03 11:55 ` [PATCH v1 03/12] arm64: dts: imx8mp-var-som-symphony: add TPM support Stefano Radaelli
2026-06-03 11:55 ` [PATCH v1 04/12] arm64: dts: imx8mp-var-som-symphony: add external RTC Stefano Radaelli
2026-06-03 11:55 ` [PATCH v1 05/12] arm64: dts: imx8mp-var-som-symphony: enable header UARTs Stefano Radaelli
2026-06-03 11:55 ` [PATCH v1 06/12] arm64: dts: imx8mp-var-som-symphony: enable PCIe Stefano Radaelli
2026-06-03 12:14   ` sashiko-bot
2026-06-03 11:55 ` [PATCH v1 07/12] arm64: dts: imx8mp-var-som-symphony: add HDMI support Stefano Radaelli
2026-06-03 12:13   ` sashiko-bot
2026-06-03 11:55 ` [PATCH v1 08/12] arm64: dts: imx8mp-var-som-symphony: add capacitive touchscreen Stefano Radaelli
2026-06-03 11:55 ` [PATCH v1 09/12] arm64: dts: imx8mp-var-som-symphony: enable ECSPI2 Stefano Radaelli
2026-06-03 11:55 ` [PATCH v1 10/12] arm64: dts: imx8mp-var-som-symphony: keep RGB_SEL low Stefano Radaelli
2026-06-03 12:04   ` sashiko-bot
2026-06-03 11:55 ` [PATCH v1 11/12] arm64: dts: imx8mp-var-som-symphony: enable PWM1 Stefano Radaelli
2026-06-03 11:55 ` [PATCH v1 12/12] arm64: dts: freescale: imx8mp-var-som: add I2C1 bus recovery GPIOs Stefano Radaelli

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