From: Vladimir Oltean <vladimir.oltean@nxp.com>
To: Conor Dooley <conor@kernel.org>
Cc: linux-phy@lists.infradead.org,
Ioana Ciornei <ioana.ciornei@nxp.com>,
Vinod Koul <vkoul@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Tanjeff Moos <tanjeff.moos@westermo.com>,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
Conor Dooley <conor+dt@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Rob Herring <robh@kernel.org>
Subject: Re: [PATCH v2 phy-next 13/15] dt-bindings: phy: lynx-10g: initial document
Date: Wed, 3 Jun 2026 18:39:05 +0300 [thread overview]
Message-ID: <20260603153905.64vkypfsjfjjohva@skbuf> (raw)
In-Reply-To: <20260603-bleach-arming-247f1b0fb87b@spud>
On Wed, Jun 03, 2026 at 04:09:32PM +0100, Conor Dooley wrote:
> On Wed, Jun 03, 2026 at 02:56:54PM +0300, Vladimir Oltean wrote:
> > On Tue, Jun 02, 2026 at 06:10:30PM +0100, Conor Dooley wrote:
> > > On Fri, May 29, 2026 at 08:15:07PM +0300, Vladimir Oltean wrote:
> > > > Add a schema for the 10G Lynx SerDes. This is very similar to the modern
> > > > form of the 28G Lynx SerDes, which is very much the intention.
> > > >
> > > > We allow both forms of #phy-cells = <1> in the top-level provider
> > > > and #phy-cells = <0> in the per-lane provider for more flexibility to
> > > > consumers, and because the kernel code is shared with the 28G Lynx which
> > > > already has that support for compatibility reasons.
> > > >
> > > > Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
> > > > ---
> > > > Cc: devicetree@vger.kernel.org
> > > > Cc: Conor Dooley <conor+dt@kernel.org>
> > > > Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
> > > > Cc: Rob Herring <robh@kernel.org>
> > > >
> > > > v1->v2:
> > > > - move patch later in series, right before driver
> > > > - deliberately ignoring this Sashiko feedback:
> > > > https://lore.kernel.org/linux-phy/20260529125017.ifqunh52gdzhthdg@skbuf/
> > > > ---
> > > > .../devicetree/bindings/phy/fsl,lynx-10g.yaml | 131 ++++++++++++++++++
> > > > 1 file changed, 131 insertions(+)
> > > > create mode 100644 Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml b/Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml
> > > > new file mode 100644
> > > > index 000000000000..993f076bba4e
> > > > --- /dev/null
> > > > +++ b/Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml
> > > > @@ -0,0 +1,131 @@
> > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > > +%YAML 1.2
> > > > +---
> > > > +$id: http://devicetree.org/schemas/phy/fsl,lynx-10g.yaml#
> > > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > > +
> > > > +title: Freescale Lynx 10G SerDes PHY
> > > > +
> > > > +maintainers:
> > > > + - Vladimir Oltean <vladimir.oltean@nxp.com>
> > > > +
> > > > +description:
> > > > + The 10G Lynx is a multi-protocol SerDes block which handles networking, PCIe,
> > > > + SATA and other high-speed interfaces. It is present on most QorIQ and
> > > > + Layerscape SoCs. The register map is common, but the integration is
> > > > + SoC-specific, with the differences consisting in register endianness, the
> > > > + number of lanes, protocol converters available per lane and their location in
> > > > + the PCCR registers. Some SoCs have multiple SerDes blocks and those differ in
> > > > + their protocol capabilities per lane.
> > > > +
> > > > +properties:
> > > > + compatible:
> > > > + description:
> > > > + There is intentionally no generic fsl,lynx-10g compatible string due to
> > > > + the hardware inability to report its capabilities, despite having a
> > > > + common register map.
> > >
> > > I think you can probably drop this from the diff, and put it in the
> > > commit message.
> >
> > Ok.
> >
> > > > + enum:
> > > > + - fsl,ls1028a-serdes
> > > > + - fsl,ls1046a-serdes1
> > > > + - fsl,ls1046a-serdes2
> > > > + - fsl,ls1088a-serdes1
> > > > + - fsl,ls1088a-serdes2
> > > > + - fsl,ls2088a-serdes1
> > > > + - fsl,ls2088a-serdes2
> > > > +
> > > > + reg:
> > > > + maxItems: 1
> > > > +
> > > > + big-endian: true
> > >
> > > This isn't a required property, but should it be made required for the
> > > specific compatibles that are big endian? Or are we not that lucky, and
> > > devices can be either?
> >
> > I can make big-endian a required property for fsl,ls1046a-serdes1 and
> > fsl,ls1046a-serdes2.
>
>
> Please do. In that case,
> pw-bot: changes-requested
>
> Cheers,
> Conor.
I've already sent v3:
https://lore.kernel.org/linux-phy/20260603132059.503527-1-vladimir.oltean@nxp.com/
next prev parent reply other threads:[~2026-06-03 15:39 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20260529171509.1163787-1-vladimir.oltean@nxp.com>
2026-05-29 17:15 ` [PATCH v2 phy-next 13/15] dt-bindings: phy: lynx-10g: initial document Vladimir Oltean
2026-06-01 6:34 ` Alexander Stein
2026-06-02 9:03 ` Vladimir Oltean
2026-06-03 6:14 ` Alexander Stein
2026-06-02 17:10 ` Conor Dooley
2026-06-03 11:56 ` Vladimir Oltean
2026-06-03 15:09 ` Conor Dooley
2026-06-03 15:39 ` Vladimir Oltean [this message]
2026-05-29 17:15 ` [PATCH v2 phy-next 14/15] phy: lynx-10g: new driver Vladimir Oltean
2026-05-29 18:21 ` sashiko-bot
2026-06-03 11:53 ` Vladimir Oltean
2026-05-29 17:15 ` [PATCH v2 phy-next 15/15] MAINTAINERS: expand Lynx 28G entry to cover Lynx 10G SerDes Vladimir Oltean
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