From: sashiko-bot@kernel.org
To: DhruvinRajpura <dhruvin.rajpura@oss.qualcomm.com>
Cc: devicetree@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH 1/2] bindings: power: supply: qcom,pmic-glink: Document thermal-mitigation
Date: Tue, 09 Jun 2026 09:26:28 +0000 [thread overview]
Message-ID: <20260609092629.39C311F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260609-cooling_device_reg-v1-1-e15bddcb0086@qti.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Missing `#cooling-cells` property in the `qcom,pmic-glink.yaml` schema breaks devicetree validation.
--
commit 0b39bda76eaec494654108cde4e92f788edf6f16
Author: Dhruvin Rajpura <drajpura@qti.qualcomm.com>
bindings: power: supply: qcom,pmic-glink: Document thermal-mitigation
This commit documents the qcom,thermal-mitigation property for the PMIC
GLINK schema. It defines an array of fast charge current limits used by the
thermal framework for battery throttling.
> diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
> index ff01d2f3ee5be..fcb69ebaa7cb5 100644
> --- a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
> +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
> @@ -58,6 +58,16 @@ properties:
> The array should contain a gpio entry for each PMIC Glink connector, in reg order.
> It is defined that GPIO active level means "CC2" or Reversed/Flipped orientation.
>
> + qcom,thermal-mitigation:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + Array of fast charge current limit values for different system thermal
[Severity: Medium]
Does this introduce a regression by missing the #cooling-cells property?
By adding qcom,thermal-mitigation, the device acts as a thermal framework
cooling provider. For a platform devicetree to actually reference this
cooling provider in a thermal zone, the provider node must declare the
#cooling-cells property.
Since the schema limits which properties can be added, won't platforms
fail validation when they try to declare #cooling-cells to wire up this new
capability?
> + mitigation levels. This should be a flat array that denotes the maximum
> + charging current (in uA) for each thermal level. Elements should be listed
> + in monotonically decreasing (non-increasing) order.
> + minItems: 1
> + maxItems: 10
> +
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260609-cooling_device_reg-v1-0-e15bddcb0086@qti.qualcomm.com?part=1
next prev parent reply other threads:[~2026-06-09 9:26 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-09 9:16 [PATCH 0/2] power: supply: qcom_battmgr: Add thermal mitigation support DhruvinRajpura
2026-06-09 9:16 ` [PATCH 1/2] bindings: power: supply: qcom,pmic-glink: Document thermal-mitigation DhruvinRajpura
2026-06-09 9:26 ` sashiko-bot [this message]
2026-06-09 9:16 ` [PATCH 2/2] power: supply: qcom_battmgr: Add thermal mitigation support DhruvinRajpura
2026-06-09 9:30 ` sashiko-bot
2026-06-09 9:42 ` Konrad Dybcio
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