Re: [PATCH 1/5] arm64: dts: renesas: r9a09g077: Add VSPD and FCPVD nodes

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [High] The `vspd` node is missing the required `resets` property, which causes the `vsp1` driver probe to fail.
- [High] Clock module index `1204` is requested but not defined in the CPG driver.
- [Low] The macro `R9A09G077_LCDC_CLKD` is undefined, causing device tree compilation to fail.
--

commit ed649581c488eb5d4825350ff0a4c3886f2bbb0c
Author: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

arm64: dts: renesas: r9a09g077: Add VSPD and FCPVD nodes

This commit adds the VSPD and FCPVD device nodes to the RZ/T2H SoC device
tree.

> diff --git a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
> --- a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
[ ... ]
> +		fcpvd: fcp@920d0000 {
> +			compatible = "renesas,r9a09g077-fcpvd", "renesas,fcpv";
> +			reg = <0 0x920d0000 0 0x10000>;
> +			clocks = <&cpg CPG_CORE R9A09G077_CLK_PCLKAH>,
> +				 <&cpg CPG_MOD 1204>,

[Severity: High]
Will this clock lookup fail during probe?

Looking at the CPG driver in drivers/clk/renesas/r9a09g077-cpg.c, the
r9a09g077_mod_clks array does not seem to contain an entry for module index
1204.

Without this definition, devm_clk_get() will return an error, preventing the
fcpvd device from probing successfully.

> +				 <&cpg CPG_CORE R9A09G077_LCDC_CLKD>;

[Severity: Low]
Does this cause a compilation failure when building the device tree?

The macro R9A09G077_LCDC_CLKD does not appear to be defined anywhere in the
tree.

Because it is undefined, the preprocessor will leave the literal string in
the output, resulting in a dtc syntax error when an integer is expected.

> +			clock-names = "aclk", "pclk", "vclk";
> +			power-domains = <&cpg>;
> +		};
> +
> +		vspd: vsp@920e0000 {
> +			compatible = "renesas,r9a09g077-vsp2", "renesas,r9a07g044-vsp2";
> +			reg = <0 0x920e0000 0 0x8000>;

[Severity: High]
Is a resets property required for this node to probe successfully?

The bindings for renesas,r9a07g044-vsp2 require a resets property.
Additionally, the vsp1 driver probe function unconditionally calls
devm_reset_control_get_shared() in drivers/media/platform/renesas/vsp1/vsp1_drv.c.

If the resets property is missing from the vspd node, __reset_control_get()
will return an error and abort the driver probe.

> +			interrupts = <GIC_SPI 780 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cpg CPG_CORE R9A09G077_CLK_PCLKAH>,
> +				 <&cpg CPG_MOD 1204>,

[Severity: High]
Similarly to the fcpvd node, does the missing definition for module clock
index 1204 prevent the vspd device from probing as well?

> +				 <&cpg CPG_CORE R9A09G077_LCDC_CLKD>;

[Severity: Low]
As with the fcpvd node, will this undefined R9A09G077_LCDC_CLKD macro also
cause a device tree compilation error here?

> +			clock-names = "aclk", "pclk", "vclk";
> +			power-domains = <&cpg>;
> +			renesas,fcp = <&fcpvd>;
> +		};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260609125353.401124-1-prabhakar.mahadev-lad.rj@bp.renesas.com?part=1