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From: sashiko-bot@kernel.org
To: Prabhakar <prabhakar.csengg@gmail.com>
Cc: devicetree@vger.kernel.org, conor+dt@kernel.org,
	wsa+renesas@sang-engineering.com, robh@kernel.org
Subject: Re: [PATCH 2/5] arm64: dts: renesas: r9a09g077: Add DU node
Date: Tue, 09 Jun 2026 13:57:40 +0000	[thread overview]
Message-ID: <20260609135741.9F8901F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260609125353.401124-3-prabhakar.mahadev-lad.rj@bp.renesas.com>

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [High] The `du` node is missing the `resets` property, which will cause the DRM driver to unconditionally abort probing.
- [High] The `du` node references an unregistered clock module ID (`<&cpg CPG_MOD 1204>`), which will fail to resolve during probe.
- [Low] The device tree macro `R9A09G077_LCDC_CLKD` is referenced in the `clocks` property of the `du` node, but it is undeclared, causing a dtc syntax error.
--

commit b1b9bb2b4166cd4bcef17245d412315735a742e6
Author: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

arm64: dts: renesas: r9a09g077: Add DU node

Add Display Unit (DU) node to SoC DTSI.

> diff --git a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
> index 29ecd0189ce72..32a3fb1187000 100644
> --- a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
> @@ -1269,6 +1269,30 @@ sdhi1_vqmmc: vqmmc-regulator {
>  			};
>  		};
>  
> +		du: display@920c0000 {
> +			compatible = "renesas,r9a09g077-du";
> +			reg = <0 0x920c0000 0 0x10000>;

[Severity: High]
Are we missing the resets property for the du node here?

The rzg2l-du DRM driver unconditionally calls devm_reset_control_get_shared()
during rzg2l_du_crtc_create(). Because the resets property is absent in this
node, the call will fail and return -ENOENT. This breaks the driver probe
and prevents the display from initializing.

> +			interrupts = <GIC_SPI 781 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cpg CPG_CORE R9A09G077_CLK_PCLKAH>,
> +				 <&cpg CPG_MOD 1204>,

[Severity: High]
Does this reference an unregistered clock module ID?

The module clock ID 1204 does not appear to be registered in the CPG driver's
module clock array (r9a09g077_mod_clks). When the display drivers attempt to
acquire this clock, the clock framework will fail to resolve it and return
-ENOENT, which will prevent the display pipeline from initializing.

> +				 <&cpg CPG_CORE R9A09G077_LCDC_CLKD>;

[Severity: Low]
Is the device tree macro R9A09G077_LCDC_CLKD declared?

It seems this identifier is referenced in the clocks property but is never
defined in the bindings header. The C preprocessor will leave the identifier
unexpanded, causing dtc to encounter a raw string where it expects a cell
integer value. This throws a syntax error and fails the device tree
compilation.

> +			clock-names = "aclk", "pclk", "vclk";
> +			power-domains = <&cpg>;
> +			renesas,vsps = <&vspd 0>;
> +			status = "disabled";

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260609125353.401124-1-prabhakar.mahadev-lad.rj@bp.renesas.com?part=2

  reply	other threads:[~2026-06-09 13:57 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-09 12:53 [PATCH 0/5] Add DU, VSPD and FCPVD support for RZ/T2H and RZ/N2H SoCs Prabhakar
2026-06-09 12:53 ` [PATCH 1/5] arm64: dts: renesas: r9a09g077: Add VSPD and FCPVD nodes Prabhakar
2026-06-09 13:17   ` sashiko-bot
2026-06-09 12:53 ` [PATCH 2/5] arm64: dts: renesas: r9a09g077: Add DU node Prabhakar
2026-06-09 13:57   ` sashiko-bot [this message]
2026-06-09 12:53 ` [PATCH 3/5] arm64: dts: renesas: r9a09g087: Add VSPD and FCPVD nodes Prabhakar
2026-06-09 14:07   ` sashiko-bot
2026-06-09 12:53 ` [PATCH 4/5] arm64: dts: renesas: r9a09g087: Add DU node Prabhakar
2026-06-09 14:19   ` sashiko-bot
2026-06-09 12:53 ` [PATCH 5/5] arm64: dts: renesas: Add LCDC overlays for RZ/T2H and RZ/N2H EVKs with ADV7513 Prabhakar
2026-06-09 14:30   ` sashiko-bot
2026-06-09 16:28     ` Lad, Prabhakar

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