Re: [PATCH 3/5] arm64: dts: renesas: r9a09g087: Add VSPD and FCPVD nodes

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [High] Missing mandatory 'resets' property in vspd node causes driver probe failure.
- [Low] Undeclared macro R9A09G087_LCDC_CLKD breaks DTB compilation.
- [Low] Undocumented compatible strings and missing required properties cause strict DT schema validation failures.
--

commit 0838fa73798a48fc749c7ebe19ded83603bdc112
Author: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

arm64: dts: renesas: r9a09g087: Add VSPD and FCPVD nodes
    
Add VSPD and FCPVD nodes to RZ/N2H SoC DTSI.

> diff --git a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
> index f697e9698ed39..cb2eabe3242e0 100644
> --- a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi

[ ... ]

> @@ -1271,6 +1271,28 @@ sdhi1_vqmmc: vqmmc-regulator {
>  				status = "disabled";
>  			};
>  		};
> +
> +		fcpvd: fcp@920d0000 {
> +			compatible = "renesas,r9a09g087-fcpvd", "renesas,fcpv";

[Severity: Low]
Are the compatible strings "renesas,r9a09g087-fcpvd" and
"renesas,r9a09g087-vsp2" documented in the dt-binding schemas? 

It seems they might be missing from renesas,fcp.yaml and renesas,vsp1.yaml.
For fcpvd, this causes validation to fall through to a generic schema that
strictly enforces maxItems: 1 for the clocks property, which fails against
the 3 clocks specified here.

> +			reg = <0 0x920d0000 0 0x10000>;
> +			clocks = <&cpg CPG_CORE R9A09G087_CLK_PCLKAH>,
> +				 <&cpg CPG_MOD 1204>,
> +				 <&cpg CPG_CORE R9A09G087_LCDC_CLKD>;

[Severity: Low]
Where is R9A09G087_LCDC_CLKD defined?

This macro appears to be undeclared in the dt-bindings header or anywhere
else in the patch series, which will result in a syntax error when compiling
the device tree.

> +			clock-names = "aclk", "pclk", "vclk";
> +			power-domains = <&cpg>;
> +		};
> +
> +		vspd: vsp@920e0000 {
> +			compatible = "renesas,r9a09g087-vsp2", "renesas,r9a07g044-vsp2";
> +			reg = <0 0x920e0000 0 0x8000>;

[Severity: High]
Does the vspd node need a "resets" property to probe successfully?

Looking at vsp1_probe() in drivers/media/platform/renesas/vsp1/vsp1_drv.c,
it unconditionally requires a reset control:

	vsp1->rstc = devm_reset_control_get_shared(&pdev->dev, NULL);
	if (IS_ERR(vsp1->rstc))
		return dev_err_probe(&pdev->dev, PTR_ERR(vsp1->rstc),

Without the resets property, this call will return -ENOENT and cause the probe
sequence to abort. Additionally, missing the resets property will cause
dtbs_check validation failures.

> +			interrupts = <GIC_SPI 780 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cpg CPG_CORE R9A09G087_CLK_PCLKAH>,
> +				 <&cpg CPG_MOD 1204>,
> +				 <&cpg CPG_CORE R9A09G087_LCDC_CLKD>;

[Severity: Low]
Does this also need the missing R9A09G087_LCDC_CLKD macro definition, similar
to the fcpvd node above?

> +			clock-names = "aclk", "pclk", "vclk";
> +			power-domains = <&cpg>;
> +			renesas,fcp = <&fcpvd>;
> +		};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260609125353.401124-1-prabhakar.mahadev-lad.rj@bp.renesas.com?part=3