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From: sashiko-bot@kernel.org
To: "Taniya Das" <taniya.das@oss.qualcomm.com>
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v6 7/7] arm64: dts: qcom: eliza: Add support for MM clock controllers
Date: Tue, 09 Jun 2026 15:30:11 +0000	[thread overview]
Message-ID: <20260609153012.591551F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260609-b4-eliza_mm_cc_v6-v6-7-17df09e5940c@oss.qualcomm.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Device tree nodes `gpucc`, `videocc`, and `camcc` are inserted out of unit-address order.
--

commit 9bb17a71a8a57aa4e3d701d95bd65991638afc45
Author: Taniya Das <taniya.das@oss.qualcomm.com>

arm64: dts: qcom: eliza: Add support for MM clock controllers

Add the device nodes for the multimedia clock controllers (cambistmclkcc,
camcc, videocc, gpucc) for Qualcomm Eliza SoC.

> diff --git a/arch/arm64/boot/dts/qcom/eliza.dtsi b/arch/arm64/boot/dts/qcom/eliza.dtsi
> index 977de44b816e4..c5635f22e2a7a 100644
> --- a/arch/arm64/boot/dts/qcom/eliza.dtsi
> +++ b/arch/arm64/boot/dts/qcom/eliza.dtsi
[ ... ]
> @@ -2657,6 +2674,50 @@ mdss_dp0_out: endpoint {
>  			};
>  		};
>  
> +		gpucc: clock-controller@3d90000 {

[Severity: Low]
Are these new nodes inserted out of unit-address order?

It looks like gpucc@3d90000, videocc@aaf0000, and camcc@ade0000 are being
placed after the mdss@ae00000 node (which concludes just above), rather
than in strictly sequential order.

Standard device tree coding style requires child nodes within a bus to be
sorted sequentially by their unit-address. For example, gpucc@3d90000 should
likely be placed significantly earlier in the file.

> +			compatible = "qcom,eliza-gpucc";
> +			reg = <0x0 0x03d90000 0x0 0xa000>;
[ ... ]
> +		videocc: clock-controller@aaf0000 {

[Severity: Low]
Similar to gpucc, is this node also placed out of unit-address order?

The @aaf0000 address precedes @ae00000 and should be sorted accordingly.

> +			compatible = "qcom,eliza-videocc";
> +			reg = <0x0 0xaaf0000 0x0 0x10000>;
[ ... ]
> +		camcc: clock-controller@ade0000 {

[Severity: Low]
And for camcc, is this node also out of unit-address order? The @ade0000
address should precede the @ae00000 block.

> +			compatible = "qcom,eliza-camcc";
> +			reg = <0x0 0x0ade0000 0x0 0x20000>;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260609-b4-eliza_mm_cc_v6-v6-0-17df09e5940c@oss.qualcomm.com?part=7

      reply	other threads:[~2026-06-09 15:30 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-09 15:02 [PATCH v6 0/7] Add support for Video, Camera, Graphics clock controllers on Eliza Taniya Das
2026-06-09 15:02 ` [PATCH v6 1/7] dt-bindings: clock: qcom: Add video clock controller on Qualcomm Eliza SoC Taniya Das
2026-06-09 15:02 ` [PATCH v6 2/7] dt-bindings: clock: qcom: document the Eliza GPU Clock Controller Taniya Das
2026-06-09 15:02 ` [PATCH v6 3/7] dt-bindings: clock: qcom: Add support for CAMCC for Eliza Taniya Das
2026-06-09 15:16   ` sashiko-bot
2026-06-09 15:02 ` [PATCH v6 4/7] clk: qcom: videocc: Add video clock controller driver " Taniya Das
2026-06-09 15:24   ` sashiko-bot
2026-06-09 15:02 ` [PATCH v6 5/7] clk: qcom: gpucc: Add GPU Clock Controller " Taniya Das
2026-06-09 15:02 ` [PATCH v6 6/7] clk: qcom: camcc: Add support for camera clock controller " Taniya Das
2026-06-09 15:21   ` sashiko-bot
2026-06-09 15:02 ` [PATCH v6 7/7] arm64: dts: qcom: eliza: Add support for MM clock controllers Taniya Das
2026-06-09 15:30   ` sashiko-bot [this message]

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