Re: [PATCH v8 1/3] dt-bindings: timer: mips,p8700-gcru

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Mismatch between the node's unit-address and the first address in its 'reg' property in the device tree example.
--

commit 28ad318962744fd052dc7a14265d2214d613bc60
Author: Aleksa Paunovic <aleksa.paunovic@htecgroup.com>

dt-bindings: timer: mips,p8700-gcru

Add dt-bindings for the GCR.U memory mapped timer device for RISC-V
platforms. The GCR.U memory region contains shadow copies of the RISC-V
mtime register and the hrtime Global Configuration Register.

> diff --git a/Documentation/devicetree/bindings/timer/mips,p8700-gcru.yaml b/Documentation/devicetree/bindings/timer/mips,p8700-gcru.yaml
> new file mode 100644
> index 0000000000000..3498255762cce
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/mips,p8700-gcru.yaml

[ ... ]

> +examples:
> +  - |
> +    timer@1617f000 {
> +        compatible = "mips,p8700-gcru";
> +        reg = <0x1617f050 0x8>,

[Severity: Low]
Does the unit-address in the node name (1617f000) need to exactly match the 
first address specified in the reg property (1617f050)? This mismatch will 
likely trigger a unit_address_vs_reg warning during dt_binding_check.

> +              <0x1617f090 0x8>;
> +    };

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260610-riscv-time-mmio-v8-0-a865206675c6@htecgroup.com?part=1