Re: [PATCH 2/2] riscv: dts: sophgo: Add Milk-V Duo 256M board support

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [Low] The device tree references a non-existent `&porte` phandle, which will cause a fatal `dtc` compilation error.
- [Low] The device tree references a non-existent `&usb` phandle, which will cause a fatal `dtc` compilation error.
- [Low] An unnecessary trailing blank line is added to the Makefile.
--

commit 789d472cb56d573e2ba1106b883551407093dd43
Author: Chen-Yu Yeh <chenyou910331@gmail.com>

riscv: dts: sophgo: Add Milk-V Duo 256M board support

This commit adds basic device tree support for the Milk-V Duo 256M board, 
based on the Sophgo SG2002 SoC. It configures the UART console, SD/MMC 
controller, USB host, and a status LED.

> diff --git a/arch/riscv/boot/dts/sophgo/Makefile b/arch/riscv/boot/dts/sophgo/Makefile
> index 6f65526d4193b..e49c8233ae1ff 100644
> --- a/arch/riscv/boot/dts/sophgo/Makefile
> +++ b/arch/riscv/boot/dts/sophgo/Makefile
[ ... ]
> @@ -2,7 +2,9 @@
>  dtb-$(CONFIG_ARCH_SOPHGO) += cv1800b-milkv-duo.dtb
>  dtb-$(CONFIG_ARCH_SOPHGO) += cv1812h-huashan-pi.dtb
>  dtb-$(CONFIG_ARCH_SOPHGO) += sg2002-licheerv-nano-b.dtb
> +dtb-$(CONFIG_ARCH_SOPHGO) += sg2002-milkv-duo256m.dtb
>  dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-milkv-pioneer.dtb
>  dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-evb-v1.dtb
>  dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-evb-v2.dtb
>  dtb-$(CONFIG_ARCH_SOPHGO) += sg2044-sophgo-srd3-10.dtb
> +

[Severity: Low]
This isn't a bug, but is this trailing blank line intended? It adds
unnecessary whitespace at the end of the Makefile.

> diff --git a/arch/riscv/boot/dts/sophgo/sg2002-milkv-duo256m.dts b/arch/riscv/boot/dts/sophgo/sg2002-milkv-duo256m.dts
> new file mode 100644
> index 0000000000000..882fba441396b
> --- /dev/null
> +++ b/arch/riscv/boot/dts/sophgo/sg2002-milkv-duo256m.dts
[ ... ]
> +	leds {
> +		compatible = "gpio-leds";
> +
> +		led-blue {
> +			label = "milkv:blue:status";
> +			gpios = <&porte 2 GPIO_ACTIVE_HIGH>;

[Severity: Low]
Will this compile successfully? It appears the porte phandle is not yet
defined in the parent dtsi files, which would cause a fatal dtc compilation
error.

[ ... ]
> +&uart0 {
> +	pinctrl-0 = <&uart0_cfg>;
> +	pinctrl-names = "default";
> +	status = "okay";
> +};
> +
> +&usb {
> +	dr_mode = "host";
> +	status = "okay";
> +};

[Severity: Low]
Similar to the porte phandle above, is the usb label defined in the
parent SoC dtsi files? Overriding an undefined label will also cause a
dtc build failure.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260610111136.1514155-1-chenyou910331@gmail.com?part=2