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From: sashiko-bot@kernel.org
To: "Konrad Dybcio" <konradybcio@kernel.org>
Cc: vkoul@kernel.org, neil.armstrong@linaro.org, olteanv@gmail.com,
	linux-phy@lists.infradead.org, robh@kernel.org,
	conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 3/4] arm64: dts: qcom: msm8996: Add VDD_MX to QUSB2 PHYs
Date: Wed, 10 Jun 2026 12:18:23 +0000	[thread overview]
Message-ID: <20260610121824.111631F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260610-topic-8996_61x5_qusb2phy-v1-3-d7135980e78f@oss.qualcomm.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Adding the VDD_MX power domain interacts brokenly with the PHY driver's runtime PM implementation, permanently pinning the VDD_MX power rail and causing a severe battery drain regression during system idle.
--

commit f3735b6dfcc42f0f55443d0f81c7b256532b0e25
Author: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

arm64: dts: qcom: msm8996: Add VDD_MX to QUSB2 PHYs

This commit adds the VDD_MX power rail description to the QUSB2 PHYs in the
msm8996 device tree. It explicitly sets the power domain and required OPPs
for both primary and secondary PHY nodes.

> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> index 2f67e665996f3..b7cd1928335c8 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> @@ -3192,7 +3192,12 @@ hsusb_phy1: phy@7411000 {
>  			clock-names = "cfg_ahb", "ref";
>  
>  			resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
> +
> +			power-domains = <&rpmpd MSM8996_VDDMX>;
> +			required-opps = <&rpmpd_opp4>;

[Severity: High]
Does adding this power domain permanently pin the VDD_MX rail?

Looking at the driver in drivers/phy/qualcomm/phy-qcom-qusb2.c,
qusb2_phy_probe() sets up runtime PM like this:

	pm_runtime_set_active(dev);
	pm_runtime_forbid(dev);
	ret = devm_pm_runtime_enable(dev);

Because the driver forbids runtime suspend by default, the device stays
permanently active. 

If we attach the PM domain and require an OPP here, won't the generic PM
domain framework apply the OPP4 performance state permanently, preventing the
SoC from scaling down its logic voltage during system idle?

> +
>  			nvmem-cells = <&qusb2p_hstx_trim>;
> +
>  			status = "disabled";
>  		};
>  
> @@ -3206,7 +3211,12 @@ hsusb_phy2: phy@7412000 {
>  			clock-names = "cfg_ahb", "ref";
>  
>  			resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
> +
> +			power-domains = <&rpmpd MSM8996_VDDMX>;
> +			required-opps = <&rpmpd_opp4>;
> +
>  			nvmem-cells = <&qusb2s_hstx_trim>;
> +
>  			status = "disabled";
>  		};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260610-topic-8996_61x5_qusb2phy-v1-0-d7135980e78f@oss.qualcomm.com?part=3

  reply	other threads:[~2026-06-10 12:18 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-10 12:04 [PATCH 0/4] Fix up QUSB2 PHY description for MSM8996/SM61[12]5 Konrad Dybcio
2026-06-10 12:04 ` [PATCH 1/4] dt-bindings: phy: qcom,qusb2: Straighten out SM6125 and MSM8996 Konrad Dybcio
2026-06-10 12:25   ` sashiko-bot
2026-06-10 12:04 ` [PATCH 2/4] phy: qcom-qusb2: Fix SM6115 init sequence Konrad Dybcio
2026-06-10 12:57   ` Abel Vesa
2026-06-10 13:20   ` Dmitry Baryshkov
2026-06-10 12:04 ` [PATCH 3/4] arm64: dts: qcom: msm8996: Add VDD_MX to QUSB2 PHYs Konrad Dybcio
2026-06-10 12:18   ` sashiko-bot [this message]
2026-06-10 13:22     ` Dmitry Baryshkov
2026-06-10 13:21   ` Dmitry Baryshkov
2026-06-10 13:33     ` Konrad Dybcio
2026-06-10 12:04 ` [PATCH 4/4] arm64: dts: qcom: sm6125: Fix QUSB2 compatible Konrad Dybcio
2026-06-10 12:53   ` Dmitry Baryshkov
2026-06-10 12:49 ` [PATCH 0/4] Fix up QUSB2 PHY description for MSM8996/SM61[12]5 Konrad Dybcio
2026-06-10 13:03   ` Dmitry Baryshkov
2026-06-10 13:13     ` Konrad Dybcio
2026-06-10 13:20       ` Dmitry Baryshkov

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