Re: [PATCH v3 7/7] arm64: dts: renesas: white-hawk: Add second mini-DP output support

[Laurent Pinchart <laurent.pinchart@ideasonboard.com>]

Hi Tomi, Geert,

Thank you for the patch.

On Fri, May 15, 2026 at 12:09:32PM +0300, Tomi Valkeinen wrote:
> From: Geert Uytterhoeven <geert+renesas@glider.be>
> 
> Add support for the mini-DisplayPort connector on the White Hawk
> BreakOut board.  This port is driven by a TI SN65DSI86 DSI to eDP
> bridge, which in turn gets the pixel data from the second DSI channel on
> the R-Car V4H SoC.  Note that this port is not present on the White Hawk

I would write "connector" instead of "port". The White Hawk Single
connects the DSI1 output to a GMSL serializer.

> Single development board.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> [tomi.valkeinen: added status=okay for dsc]
> Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>

Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

> ---
>  .../arm64/boot/dts/renesas/r8a779g0-white-hawk.dts | 94 ++++++++++++++++++++++
>  1 file changed, 94 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk.dts b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk.dts
> index 784d4e8b204c..89d60b83ac4f 100644
> --- a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk.dts
> @@ -12,4 +12,98 @@
>  / {
>  	model = "Renesas White Hawk CPU and Breakout boards based on r8a779g0";
>  	compatible = "renesas,white-hawk-breakout", "renesas,white-hawk-cpu", "renesas,r8a779g0";
> +
> +	sn65dsi86_refclk2: clk-x16 {
> +		compatible = "fixed-clock";
> +		#clock-cells = <0>;
> +		clock-frequency = <38400000>;
> +	};
> +
> +	mini-dp-con2 {
> +		compatible = "dp-connector";
> +		label = "CN15";
> +		type = "mini";
> +
> +		port {
> +			mini_dp_con_in2: endpoint {
> +				remote-endpoint = <&sn65dsi86_out2>;
> +			};
> +		};
> +	};
> +};
> +
> +&dsc {
> +	status = "okay";
> +};
> +
> +&dsi1 {
> +	status = "okay";
> +
> +	ports {
> +		port@1 {
> +			dsi1_out: endpoint {
> +				remote-endpoint = <&sn65dsi86_in2>;
> +				data-lanes = <1 2 3 4>;
> +			};
> +		};
> +	};
> +};
> +
> +&i2c4 {
> +	pinctrl-0 = <&i2c4_pins>;
> +	pinctrl-names = "default";
> +
> +	status = "okay";
> +	clock-frequency = <400000>;
> +
> +	bridge@2c {
> +		pinctrl-0 = <&irq1_pins>;
> +		pinctrl-names = "default";
> +
> +		compatible = "ti,sn65dsi86";
> +		reg = <0x2c>;
> +
> +		clocks = <&sn65dsi86_refclk2>;
> +		clock-names = "refclk";
> +
> +		interrupts-extended = <&intc_ex 1 IRQ_TYPE_LEVEL_HIGH>;
> +
> +		enable-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
> +
> +		vccio-supply = <&reg_1p8v>;
> +		vpll-supply = <&reg_1p8v>;
> +		vcca-supply = <&reg_1p2v>;
> +		vcc-supply = <&reg_1p2v>;
> +
> +		ports {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			port@0 {
> +				reg = <0>;
> +				sn65dsi86_in2: endpoint {
> +					remote-endpoint = <&dsi1_out>;
> +				};
> +			};
> +
> +			port@1 {
> +				reg = <1>;
> +				sn65dsi86_out2: endpoint {
> +					remote-endpoint = <&mini_dp_con_in2>;
> +				};
> +			};
> +		};
> +	};
> +};
> +
> +&pfc {
> +	i2c4_pins: i2c4 {
> +		groups = "i2c4";
> +		function = "i2c4";
> +	};
> +
> +	irq1_pins: irq1 {
> +		groups = "intc_ex_irq1_a";
> +		function = "intc_ex";
> +	};
>  };
> 

-- 
Regards,

Laurent Pinchart