From: Paul Kocialkowski <paulk@sys-base.io>
To: linux-media@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org
Cc: Yong Deng <yong.deng@magewell.com>,
Paul Kocialkowski <paulk@sys-base.io>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Chen-Yu Tsai <wens@kernel.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney@redhat.com>,
Maxime Ripard <mripard@kernel.org>,
Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Subject: [PATCH v10 3/6] ARM: dts: sun8i: v3s: Add mbus node to represent the interconnect
Date: Sat, 13 Jun 2026 17:26:52 +0200 [thread overview]
Message-ID: <20260613152655.212490-4-paulk@sys-base.io> (raw)
In-Reply-To: <20260613152655.212490-1-paulk@sys-base.io>
From: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
The V3s uses the mbus interconnect to provide DRAM access for a
number of blocks. The SoC can only map 2 GiB of DRAM, which is
reflected in the dma-ranges property.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
---
arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi
index fa54510319ac..02d6c62b3874 100644
--- a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi
@@ -629,6 +629,21 @@ int_mii_phy: ethernet-phy@1 {
};
};
+ mbus: dram-controller@1c62000 {
+ compatible = "allwinner,sun8i-v3s-mbus";
+ reg = <0x01c62000 0x1000>,
+ <0x01c63000 0x1000>;
+ reg-names = "mbus", "dram";
+ clocks = <&ccu CLK_MBUS>,
+ <&ccu CLK_DRAM>,
+ <&ccu CLK_BUS_DRAM>;
+ clock-names = "mbus", "dram", "bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ dma-ranges = <0x00000000 0x40000000 0x80000000>;
+ #interconnect-cells = <1>;
+ };
+
spi0: spi@1c68000 {
compatible = "allwinner,sun8i-h3-spi";
reg = <0x01c68000 0x1000>;
--
2.54.0
next prev parent reply other threads:[~2026-06-13 15:27 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-13 15:26 [PATCH v10 0/6] Allwinner A31/A83T MIPI CSI-2 and A31 ISP / Platform Support Paul Kocialkowski
2026-06-13 15:26 ` [PATCH v10 1/6] dt-bindings: sun8i-v3s-ccu: Export MBUS and DRAM clocks to the public header Paul Kocialkowski
2026-06-13 18:20 ` Krzysztof Kozlowski
2026-06-13 15:26 ` [PATCH v10 2/6] clk: sunxi-ng: v3s: Remove exported clock definitions Paul Kocialkowski
2026-06-13 15:26 ` Paul Kocialkowski [this message]
2026-06-13 15:26 ` [PATCH v10 4/6] dt-bindings: sun6i-a31-mipi-dphy: Add V3s SoC compatible entry Paul Kocialkowski
2026-06-13 15:35 ` sashiko-bot
2026-06-13 16:11 ` Paul Kocialkowski
2026-06-13 18:22 ` Krzysztof Kozlowski
2026-06-13 15:26 ` [PATCH v10 5/6] ARM: dts: sun8i: v3s: Add nodes for MIPI CSI-2 support Paul Kocialkowski
2026-06-13 15:41 ` sashiko-bot
2026-06-13 16:04 ` Paul Kocialkowski
2026-06-13 15:26 ` [PATCH v10 6/6] ARM: dts: sun8i: v3s: Add support for the ISP Paul Kocialkowski
2026-06-13 17:39 ` sashiko-bot
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