From: Conor Dooley <conor@kernel.org>
To: Hal Feng <hal.feng@starfivetech.com>
Cc: "Uwe Kleine-König" <ukleinek@kernel.org>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Emil Renner Berthing" <emil.renner.berthing@canonical.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Paul Walmsley" <pjw@kernel.org>,
"Albert Ou" <aou@eecs.berkeley.edu>,
linux-pwm@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v19 1/3] dt-bindings: pwm: opencores: Update compatibles, examples and maintainers
Date: Mon, 15 Jun 2026 17:21:42 +0100 [thread overview]
Message-ID: <20260615-crescent-equation-d948fcc46cd1@spud> (raw)
In-Reply-To: <20260615155759.129210-2-hal.feng@starfivetech.com>
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On Mon, Jun 15, 2026 at 11:57:57PM +0800, Hal Feng wrote:
> Remove the jh8100 compatible since the JH8100 SoC has been canceled and
> will not be released. Add the jhb100 compatible to replace it.
> Use a oneOf construct to support the single-string opencores,pwm-v1
> compatible.
No thanks. Simple as this IP might be, I still want soc-specific
compatibles to be a requirement.
pw-bot: changes-requested
Thanks,
Conor.
>
> Change the register size in examples to 0x10, since an OpenCores PTC IP
> has only 4 32-bit registers: CNTR, HRC, LRC and CTRL.
>
> I will maintain this pwm module in place of William.
>
> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> ---
> .../devicetree/bindings/pwm/opencores,pwm.yaml | 16 +++++++++-------
> 1 file changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pwm/opencores,pwm.yaml b/Documentation/devicetree/bindings/pwm/opencores,pwm.yaml
> index 52a59d245cdb..5f05606a2d3d 100644
> --- a/Documentation/devicetree/bindings/pwm/opencores,pwm.yaml
> +++ b/Documentation/devicetree/bindings/pwm/opencores,pwm.yaml
> @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
> title: OpenCores PWM controller
>
> maintainers:
> - - William Qiu <william.qiu@starfivetech.com>
> + - Hal Feng <hal.feng@starfivetech.com>
>
> description:
> The OpenCores PTC ip core contains a PWM controller. When operating in PWM
> @@ -19,12 +19,14 @@ allOf:
>
> properties:
> compatible:
> - items:
> - - enum:
> - - starfive,jh7100-pwm
> - - starfive,jh7110-pwm
> - - starfive,jh8100-pwm
> + oneOf:
> - const: opencores,pwm-v1
> + - items:
> + - enum:
> + - starfive,jh7100-pwm
> + - starfive,jh7110-pwm
> + - starfive,jhb100-pwm
> + - const: opencores,pwm-v1
>
> reg:
> maxItems: 1
> @@ -49,7 +51,7 @@ examples:
> - |
> pwm@12490000 {
> compatible = "starfive,jh7110-pwm", "opencores,pwm-v1";
> - reg = <0x12490000 0x10000>;
> + reg = <0x12490000 0x10>;
> clocks = <&clkgen 181>;
> resets = <&rstgen 109>;
> #pwm-cells = <3>;
> --
> 2.43.2
>
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next prev parent reply other threads:[~2026-06-15 16:21 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-15 15:57 [PATCH v19 0/3] Add OpenCores PTC PWM support Hal Feng
2026-06-15 15:57 ` [PATCH v19 1/3] dt-bindings: pwm: opencores: Update compatibles, examples and maintainers Hal Feng
2026-06-15 16:21 ` Conor Dooley [this message]
2026-06-15 16:24 ` sashiko-bot
2026-06-15 15:57 ` [PATCH v19 2/3] riscv: dts: starfive: Correct pwm nodes Hal Feng
2026-06-15 15:57 ` [PATCH v19 3/3] pwm: Add OpenCores PTC PWM driver Hal Feng
2026-06-15 16:25 ` sashiko-bot
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