Re: [PATCH v2 4/5] arm64: dts: exynos: add initial support for Samsung Exynos8855 smdk

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 4 potential issue(s) to consider:
- [High] Missing `interrupts` property for multiplexed pinctrl blocks breaks GPIO interrupts.
- [Low] The timer node incorrectly uses the legacy GIC_CPU_MASK_SIMPLE macro for its GICv3 PPI interrupts.
- [Low] Usage of magic numbers instead of standard macros for pinctrl configurations.
- [Low] Board device tree header comment references the wrong SoC and hardware.
--

commit 8b3b2980b627113d8b255b5b20a2fd0b03fe40a0
Author: Alim Akhtar <alim.akhtar@samsung.com>

arm64: dts: exynos: add initial support for Samsung Exynos8855 smdk

Add initial devicetree support for Samsung smdk board using
Exynos8855 SoC.

> diff --git a/arch/arm64/boot/dts/exynos/exynos8855-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos8855-pinctrl.dtsi
> new file mode 100644
> index 0000000000000..df69b2b3e96ad
> --- /dev/null
> +++ b/arch/arm64/boot/dts/exynos/exynos8855-pinctrl.dtsi
[ ... ]
> +	uart0_pins: uart0-pins {
> +		samsung,pins = "gpq0-0", "gpq0-1";
> +		samsung,pin-function = <2>;
> +		samsung,pin-pud = <3>;

[Severity: Low]
This isn't a bug, but could we use standard device tree binding macros like
EXYNOS_PIN_FUNC_2 and EXYNOS_PIN_PULL_UP from <dt-bindings/pinctrl/samsung.h>
here instead of magic numbers?

> +	};
> +
> +};
[ ... ]
> diff --git a/arch/arm64/boot/dts/exynos/exynos8855-smdk.dts b/arch/arm64/boot/dts/exynos/exynos8855-smdk.dts
> new file mode 100644
> index 0000000000000..f5132bcaa47c8
> --- /dev/null
> +++ b/arch/arm64/boot/dts/exynos/exynos8855-smdk.dts
> @@ -0,0 +1,32 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Samsung Exynos8855 SMDK board device tree source
> + *
> + * Copyright (C) 2026 Samsung Electronics Co., Ltd.
> + *
> + * Device tree source file for WinLink's E850-96 board which is based on
> + * Samsung Exynos8855 SoC.

[Severity: Low]
This isn't a bug, but does this comment refer to the wrong board? The text
mentions the WinLink E850-96 board instead of the Exynos 8855 SMDK board.

> + */
> +
> +/dts-v1/;
[ ... ]
> diff --git a/arch/arm64/boot/dts/exynos/exynos8855.dtsi b/arch/arm64/boot/dts/exynos/exynos8855.dtsi
> new file mode 100644
> index 0000000000000..d403f41bbecb5
> --- /dev/null
> +++ b/arch/arm64/boot/dts/exynos/exynos8855.dtsi
[ ... ]
> +		pinctrl_peric: pinctrl@15440000 {
> +			compatible = "samsung,exynos8855-pinctrl";
> +			reg = <0x15440000 0x1000>;
> +		};

[Severity: High]
Is an interrupts property missing for this node and the other non-alive
pinctrl nodes (like pinctrl_usi, pinctrl_pericmmc, and pinctrl_hsi_ufs)?

These blocks contain child GPIO banks that are marked as interrupt
controllers, but the exynos pinctrl driver relies on the parent's interrupts
property to initialize the IRQ domain.

Without it, exynos_eint_gpio_init() will return -EINVAL, breaking GPIO
interrupt functionality for these pins.

> +
> +		pinctrl_pericmmc: pinctrl@154f0000 {
> +			compatible = "samsung,exynos8855-pinctrl";
> +			reg = <0x154f0000 0x1000>;
> +		};
> +
> +		pinctrl_hsi_ufs: pinctrl@17040000 {
> +			compatible = "samsung,exynos8855-pinctrl";
> +			reg = <0x17040000 0x1000>;
> +		};
> +	};
> +
> +	timer {
> +		compatible = "arm,armv8-timer";
> +		/* Hypervisor Virtual Timer interrupt is not wired to GIC */
> +		interrupts =
> +		     <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> +		     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> +		     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> +		     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;

[Severity: Low]
Is it correct to use the GIC_CPU_MASK_SIMPLE macro here?

The interrupt controller is arm,gic-v3. GIC_CPU_MASK_SIMPLE sets bits [15:8],
which violates the GICv3 DT binding that strictly expects trigger type and
level flags in bits [3:0] for the third cell.

While the upper bits are masked during parsing, this will trigger dtbs_check
validation errors.

> +	};
> +};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260615085252.1964423-1-alim.akhtar@samsung.com?part=4