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Mon, 22 Jun 2026 10:52:12 -0700 (PDT) Received: from [10.30.232.252] ([2409:40c2:7415:f49b:1d79:b65e:e5e5:aa4c]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2c7c4a482a5sm1661075ad.25.2026.06.22.10.52.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jun 2026 10:52:11 -0700 (PDT) From: Bhargav Joshi Date: Mon, 22 Jun 2026 23:21:33 +0530 Subject: [PATCH v2] dt-bindings: clock: ti,clockdomain: Convert to DT schema Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260622-ti-clockdomain-v2-1-434dbe0789e2@gmail.com> X-B4-Tracking: v=1; b=H4sIAAAAAAAC/13MQQqDMBCF4avIrJuSCWhrV72HuBiSUYeqKYmEF sndm0pXXf4P3rdD5CAc4VbtEDhJFL+WMKcK7ETryEpcaTDaNLpBrTZRdvb24fxCsioyF+f0QEi uhnJ6Bh7kdYBdX3qSuPnwPvyE3/VHGfynEipU3LZUNzS0V6b7WPb5bP0Cfc75A0Tai0ysAAAA X-Change-ID: 20260610-ti-clockdomain-a27dd0fa1ad5 To: Michael Turquette , Stephen Boyd , Brian Masney , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Tero Kristo Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, goledhruva@gmail.com, m-chawdhry@ti.com, daniel.baluta@gmail.com, simona.toaca@nxp.com, j.bhargav.u@gmail.com X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1782150724; l=4363; i=j.bhargav.u@gmail.com; h=from:subject:message-id; bh=phde+2c+y1PP9o+vu6bFzca28DkhbqXg0K330uAMoyM=; b=MOi6XTlhYsHiLRYt3SRrvqgVyslJ9itphnNCoCdKo24Y5Pk+w6Ex1dzoNYof5VuJwUQbjIrXL phAuxaWB/EdBAm7n8gPvI8LsGXk6X5zqZ0/Nx0+xtY6X+EERawkK3yg X-Developer-Key: i=j.bhargav.u@gmail.com; a=ed25519; pk=IqNDwUZKECEA+n8wXctFLBbYL9NhFstZNbOznm/nX1k= Convert TI clockdomain to yaml DT schema. Drop '#clock-cells' from the required list as this binding doesn't define a new clock binding type, it is used to group existing clock nodes under hardware hierarchy. Most existing dts omit '#clock-cells'. Update the reference to the old legacy text binding in the description of bindings/clock/ti/ti,gate-clock.yaml to point to the new YAML file. Signed-off-by: Bhargav Joshi --- Changes in v2: - updating the stale reference to the legacy .txt file inside bindings/clock/ti/ti,gate-clock.yaml to fix make refcheckdocs error - Link to v1: https://lore.kernel.org/r/20260621-ti-clockdomain-v1-1-e99a56af98ea@gmail.com --- .../devicetree/bindings/clock/ti/clockdomain.txt | 25 ------------- .../bindings/clock/ti/ti,clockdomain.yaml | 41 ++++++++++++++++++++++ .../bindings/clock/ti/ti,gate-clock.yaml | 2 +- 3 files changed, 42 insertions(+), 26 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/ti/clockdomain.txt b/Documentation/devicetree/bindings/clock/ti/clockdomain.txt deleted file mode 100644 index edf0b5d42768..000000000000 --- a/Documentation/devicetree/bindings/clock/ti/clockdomain.txt +++ /dev/null @@ -1,25 +0,0 @@ -Binding for Texas Instruments clockdomain. - -This binding uses the common clock binding[1] in consumer role. -Every clock on TI SoC belongs to one clockdomain, but software -only needs this information for specific clocks which require -their parent clockdomain to be controlled when the clock is -enabled/disabled. This binding doesn't define a new clock -binding type, it is used to group existing clock nodes under -hardware hierarchy. - -[1] Documentation/devicetree/bindings/clock/clock-bindings.txt - -Required properties: -- compatible : shall be "ti,clockdomain" -- #clock-cells : from common clock binding; shall be set to 0. -- clocks : link phandles of clocks within this domain - -Optional properties: -- clock-output-names : from common clock binding. - -Examples: - dss_clkdm: dss_clkdm { - compatible = "ti,clockdomain"; - clocks = <&dss1_alwon_fck_3430es2>, <&dss_ick_3430es2>; - }; diff --git a/Documentation/devicetree/bindings/clock/ti/ti,clockdomain.yaml b/Documentation/devicetree/bindings/clock/ti/ti,clockdomain.yaml new file mode 100644 index 000000000000..9494cbb1a942 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/ti/ti,clockdomain.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/ti/ti,clockdomain.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments clockdomain + +maintainers: + - Tero Kristo + +description: + This binding uses the common clock binding in consumer role. Every clock on TI + SoC belongs to one clockdomain, but software only needs this information for + specific clocks which require their parent clockdomain to be controlled when + the clock is enabled/disabled. This binding doesn't define a new clock binding + type, it is used to group existing clock nodes under hardware hierarchy. + +properties: + compatible: + const: ti,clockdomain + + "#clock-cells": + const: 0 + + clocks: true + + clock-output-names: true + +required: + - compatible + - clocks + +additionalProperties: false + +examples: + - | + dss_clkdm { + compatible = "ti,clockdomain"; + clocks = <&dss1_alwon_fck_3430es2>, <&dss_ick_3430es2>; + }; diff --git a/Documentation/devicetree/bindings/clock/ti/ti,gate-clock.yaml b/Documentation/devicetree/bindings/clock/ti/ti,gate-clock.yaml index eaa727ab0d7f..438e190d1067 100644 --- a/Documentation/devicetree/bindings/clock/ti/ti,gate-clock.yaml +++ b/Documentation/devicetree/bindings/clock/ti/ti,gate-clock.yaml @@ -19,7 +19,7 @@ description: | that is used. [1] Documentation/devicetree/bindings/clock/gpio-gate-clock.yaml - [2] Documentation/devicetree/bindings/clock/ti/clockdomain.txt + [2] Documentation/devicetree/bindings/clock/ti/ti,clockdomain.yaml properties: compatible: --- base-commit: acb7500801e98639f6d8c2d796ed9f64cba83d3a change-id: 20260610-ti-clockdomain-a27dd0fa1ad5 Best regards, -- Bhargav