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[60.250.196.139]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2c7f5ac8c26sm16614995ad.1.2026.06.25.02.44.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Jun 2026 02:44:59 -0700 (PDT) From: Joey Lu To: zhengxingda@iscas.ac.cn, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: ychuang3@nuvoton.com, schung@nuvoton.com, yclu4@nuvoton.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Joey Lu Subject: [PATCH v5 1/7] dt-bindings: display: verisilicon,dc: generalize for single-output variants Date: Thu, 25 Jun 2026 17:44:43 +0800 Message-ID: <20260625094449.708386-2-a0987203069@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260625094449.708386-1-a0987203069@gmail.com> References: <20260625094449.708386-1-a0987203069@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The verisilicon,dc binding was originally written for the T-Head TH1520 SoC carrying a DC8200, and hard-codes five clocks, three resets and two output ports. Add the Nuvoton MA35D1 DCUltraLite (nuvoton,ma35d1-dcu) to the binding. The DCUltraLite uses only two clocks (core, pix0) and one reset (core), with a single output port. Use allOf/if blocks to express per-variant constraints rather than hard-coding the DC8200 topology at the top level. Each compatible's block constrains the clock and reset item counts; the nuvoton block additionally overrides clock-names to the two names it actually uses. Signed-off-by: Joey Lu --- .../bindings/display/verisilicon,dc.yaml | 57 +++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/Documentation/devicetree/bindings/display/verisilicon,dc.yaml b/Documentation/devicetree/bindings/display/verisilicon,dc.yaml index 9dc35ab973f2..1e751f3c7ce8 100644 --- a/Documentation/devicetree/bindings/display/verisilicon,dc.yaml +++ b/Documentation/devicetree/bindings/display/verisilicon,dc.yaml @@ -17,6 +17,7 @@ properties: items: - enum: - thead,th1520-dc8200 + - nuvoton,ma35d1-dcu - const: verisilicon,dc # DC IPs have discoverable ID/revision registers reg: @@ -77,6 +78,62 @@ required: - clock-names - ports +allOf: + - if: + properties: + compatible: + contains: + const: thead,th1520-dc8200 + then: + properties: + clocks: + minItems: 5 + maxItems: 5 + + clock-names: + minItems: 5 + maxItems: 5 + + resets: + minItems: 3 + maxItems: 3 + + reset-names: + minItems: 3 + maxItems: 3 + + required: + - resets + - reset-names + + - if: + properties: + compatible: + contains: + const: nuvoton,ma35d1-dcu + then: + properties: + clocks: + minItems: 2 + maxItems: 2 + + clock-names: + items: + - const: core + - const: pix0 + + resets: + minItems: 1 + maxItems: 1 + + reset-names: + items: + - const: core + + required: + - resets + - reset-names + additionalProperties: false examples: -- 2.43.0