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[60.250.196.139]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2c7f5ac8c26sm16614995ad.1.2026.06.25.02.45.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Jun 2026 02:45:10 -0700 (PDT) From: Joey Lu To: zhengxingda@iscas.ac.cn, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: ychuang3@nuvoton.com, schung@nuvoton.com, yclu4@nuvoton.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Joey Lu Subject: [PATCH v5 4/7] drm/verisilicon: make axi and ahb clocks optional Date: Thu, 25 Jun 2026 17:44:46 +0800 Message-ID: <20260625094449.708386-5-a0987203069@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260625094449.708386-1-a0987203069@gmail.com> References: <20260625094449.708386-1-a0987203069@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The Nuvoton MA35D1 SoC integrates a DCUltraLite display controller whose AXI and AHB bus clocks share a single gate enable bit with the display core clock, so the clock driver does not expose them separately. This patch makes the axi and ahb clocks optional in the probe. Signed-off-by: Joey Lu --- drivers/gpu/drm/verisilicon/vs_dc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/verisilicon/vs_dc.c b/drivers/gpu/drm/verisilicon/vs_dc.c index 9729b693d360..fd1f5fe67a68 100644 --- a/drivers/gpu/drm/verisilicon/vs_dc.c +++ b/drivers/gpu/drm/verisilicon/vs_dc.c @@ -90,13 +90,13 @@ static int vs_dc_probe(struct platform_device *pdev) return PTR_ERR(dc->core_clk); } - dc->axi_clk = devm_clk_get_enabled(dev, "axi"); + dc->axi_clk = devm_clk_get_optional_enabled(dev, "axi"); if (IS_ERR(dc->axi_clk)) { dev_err(dev, "can't get axi clock\n"); return PTR_ERR(dc->axi_clk); } - dc->ahb_clk = devm_clk_get_enabled(dev, "ahb"); + dc->ahb_clk = devm_clk_get_optional_enabled(dev, "ahb"); if (IS_ERR(dc->ahb_clk)) { dev_err(dev, "can't get ahb clock\n"); return PTR_ERR(dc->ahb_clk); -- 2.43.0