Re: [PATCH 1/3] arm64: dts: ti: Add PLL1 refclk to J784S4 SoC SERDES node

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Adding a third clock to the serdes2 node violates the Cadence Torrent PHY DT binding schema, which will cause `dtbs_check` validation to fail.
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commit c7948a2c66b640fab1ce0e80a89c69a933059939
Author: Gokul Praveen <g-praveen@ti.com>

arm64: dts: ti: Add PLL1 refclk to J784S4 SoC SERDES node

This commit adds the PLL1 reference clock to the clocks and clock-names
properties of the SERDES2 node. This is done to satisfy the assigned-clocks
parameter and prevent multilink configuration failures.

> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> index 78fcd0c40abcf..da8d582574d03 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> @@ -122,8 +122,9 @@ serdes2: serdes@5020000 {
>  			resets = <&serdes_wiz2 0>;
>  			reset-names = "torrent_reset";
>  			clocks = <&serdes_wiz2 TI_WIZ_PLL0_REFCLK>,
> +				 <&serdes_wiz2 TI_WIZ_PLL1_REFCLK>,
>  				 <&serdes_wiz2 TI_WIZ_PHY_EN_REFCLK>;
> -			clock-names = "refclk", "phy_en_refclk";
> +			clock-names = "refclk","pll1_refclk", "phy_en_refclk";

[Severity: Low]
Will adding a third clock to the serdes2 node cause dtbs_check validation
to fail?

The Cadence Torrent PHY device tree binding schema in
Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml restricts
the clocks and clock-names properties to a maximum of 2 items. By adding
pll1_refclk alongside refclk and phy_en_refclk, the array now contains 3
items, which violates the existing schema constraints.

Does the device tree binding schema need to be updated first to support
this third clock?

>  			assigned-clocks = <&serdes_wiz2 TI_WIZ_PLL0_REFCLK>,
>  					  <&serdes_wiz2 TI_WIZ_PLL1_REFCLK>,
>  					  <&serdes_wiz2 TI_WIZ_REFCLK_DIG>;

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Sashiko AI review · https://sashiko.dev/#/patchset/20260625120805.28948-1-g-praveen@ti.com?part=1