Re: [PATCH v5 2/3] arm64: dts: qcom: monaco: Add monaco-ac EVK board

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] Massive contradiction in I2C GPIO expander configuration (1x TCA9534 vs 7x TCA9538)
- [Low] Missing pinctrl configuration for the Ethernet PHY reset GPIO
--

commit 060d5e44d123b8d9a920b4fe86d7d2ff2f7d1da6
Author: Umang Chheda <umang.chheda@oss.qualcomm.com>

arm64: dts: qcom: monaco: Add monaco-ac EVK board

Add initial device tree support for monaco-ac EVK board, based on Qualcomm's
monaco-ac (QCS8300-AC) variant SoC.

> diff --git a/arch/arm64/boot/dts/qcom/monaco-ac-evk.dts b/arch/arm64/boot/dts/qcom/monaco-ac-evk.dts
> new file mode 100644
> index 0000000000000..6f3c3ffefe340
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/monaco-ac-evk.dts
[ ... ]
> +&i2c15 {
> +	pinctrl-0 = <&qup_i2c15_default>;
> +	pinctrl-names = "default";
> +
> +	status = "okay";
> +
> +	expander0: gpio@38 {
> +		compatible = "ti,tca9538";
> +		reg = <0x38>;
[ ... ]
> +	expander6: gpio@3e {
> +		compatible = "ti,tca9538";
> +		reg = <0x3e>;

[Severity: Medium]
Is the commit message description accurate? The commit message mentions a
single TCA9534 expander providing 8 GPIO lines, but the device tree adds
seven TCA9538 expanders here.

If the hardware actually only has one expander, won't I2C transfers to the
others time out and fail, potentially breaking peripherals like USB and
DisplayPort which route their pins through these extra expanders?

[ ... ]
> +&ethernet0 {
> +	phy-mode = "2500base-x";
> +	phy-handle = <&hsgmii_phy0>;
[ ... ]
> +	mdio {
> +		compatible = "snps,dwmac-mdio";
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		hsgmii_phy0: ethernet-phy@1c {
> +			compatible = "ethernet-phy-id004d.d101";
> +			reg = <0x1c>;
> +			reset-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>;

[Severity: Low]
Does this reset-gpios property need a corresponding pinctrl state to mux the
pin? If the bootloader leaves tlmm pin 31 in an undefined or alternate
state, could the Ethernet PHY fail to reset during network initialization?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260626111301.3479559-1-umang.chheda@oss.qualcomm.com?part=2