From: sashiko-bot@kernel.org
To: "Sebastian Reichel" <sebastian.reichel@collabora.com>
Cc: neil.armstrong@linaro.org, devicetree@vger.kernel.org,
olteanv@gmail.com, linux-phy@lists.infradead.org,
conor+dt@kernel.org, vkoul@kernel.org, robh@kernel.org
Subject: Re: [PATCH v8 01/29] dt-bindings: phy: rockchip-usbdp: add improved ports scheme
Date: Fri, 26 Jun 2026 21:13:43 +0000 [thread overview]
Message-ID: <20260626211343.960D81F00A3D@smtp.kernel.org> (raw)
In-Reply-To: <20260626-rockchip-usbdp-cleanup-v8-1-47f682987895@collabora.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Missing mutual exclusion between `port` and `ports` in device tree schema
--
commit bef609fa8f96018c59387544e50ed1e5818faa7a
Author: Sebastian Reichel <sebastian.reichel@collabora.com>
dt-bindings: phy: rockchip-usbdp: add improved ports scheme
This commit introduces a documented port scheme for the Rockchip USBDP PHY,
modeled after the Qualcomm QMP USB4-USB3-DP PHY controller binding. It adds
a top-level ports node with specific endpoints for USB, DisplayPort, and
SBU connections to properly support USB-C DP AltMode.
> diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-usbdp.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-usbdp.yaml
> --- a/Documentation/devicetree/bindings/phy/phy-rockchip-usbdp.yaml
> +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-usbdp.yaml
> @@ -114,6 +114,29 @@ properties:
> A port node to link the PHY to a TypeC controller for the purpose of
> handling orientation switching.
>
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
[Severity: Medium]
Should there be a mutual exclusion constraint between the newly added
ports property and the pre-existing port property?
If a device tree node defines both a top-level port and a ports node
simultaneously, it currently passes schema validation. However, standard
OF graph parsing functions like of_graph_get_next_endpoint() will silently
ignore the top-level port if a ports node is present, creating a shadowing
conflict.
Could this be prevented by adding a oneOf mutual exclusion constraint?
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260626-rockchip-usbdp-cleanup-v8-0-47f682987895@collabora.com?part=1
next prev parent reply other threads:[~2026-06-26 21:13 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-26 20:54 [PATCH v8 00/29] phy: rockchip: usbdp: Fixes, DP 1-lane support and cleanups Sebastian Reichel
2026-06-26 20:54 ` [PATCH v8 01/29] dt-bindings: phy: rockchip-usbdp: add improved ports scheme Sebastian Reichel
2026-06-26 21:13 ` sashiko-bot [this message]
2026-06-26 20:54 ` [PATCH v8 02/29] phy: rockchip: usbdp: Update mode_change after error handling Sebastian Reichel
2026-06-26 20:54 ` [PATCH v8 03/29] phy: rockchip: usbdp: Do not lose USB3 PHY status Sebastian Reichel
2026-06-26 21:16 ` sashiko-bot
2026-06-26 20:54 ` [PATCH v8 04/29] phy: rockchip: usbdp: Fix devm_clk_bulk_get_all check Sebastian Reichel
2026-06-26 20:54 ` [PATCH v8 05/29] phy: rockchip: usbdp: Handle missing clock-names DT property gracefully Sebastian Reichel
2026-06-26 21:12 ` sashiko-bot
2026-06-26 20:54 ` [PATCH v8 06/29] phy: rockchip: usbdp: Drop seamless DP takeover Sebastian Reichel
2026-06-26 21:16 ` sashiko-bot
2026-06-26 20:55 ` [PATCH v8 07/29] phy: rockchip: usbdp: Handle rk_udphy_reset_deassert_all errors in init check Sebastian Reichel
2026-06-26 21:11 ` sashiko-bot
2026-06-26 20:55 ` [PATCH v8 08/29] phy: rockchip: usbdp: Keep clocks running on PHY re-init Sebastian Reichel
2026-06-26 20:55 ` [PATCH v8 09/29] phy: rockchip: usbdp: Amend SSC modulation deviation Sebastian Reichel
2026-06-26 20:55 ` [PATCH v8 10/29] phy: rockchip: usbdp: Fix LFPS detect threshold control Sebastian Reichel
2026-06-26 20:55 ` [PATCH v8 11/29] phy: rockchip: usbdp: Add missing mode_change update Sebastian Reichel
2026-06-26 20:55 ` [PATCH v8 12/29] phy: rockchip: usbdp: Support single-lane DP Sebastian Reichel
2026-06-26 21:19 ` sashiko-bot
2026-06-26 20:55 ` [PATCH v8 13/29] phy: rockchip: usbdp: Limit DP lane count to muxed lanes Sebastian Reichel
2026-06-26 21:17 ` sashiko-bot
2026-06-26 20:55 ` [PATCH v8 14/29] phy: rockchip: usbdp: Rename DP lane functions Sebastian Reichel
2026-06-26 20:55 ` [PATCH v8 15/29] phy: rockchip: usbdp: Use FIELD_PREP_WM16_CONST Sebastian Reichel
2026-06-26 20:55 ` [PATCH v8 16/29] phy: rockchip: usbdp: Cleanup DP lane selection function Sebastian Reichel
2026-06-26 20:55 ` [PATCH v8 17/29] phy: rockchip: usbdp: Register DP aux bridge Sebastian Reichel
2026-06-26 21:14 ` sashiko-bot
2026-06-26 20:55 ` [PATCH v8 18/29] phy: rockchip: usbdp: Drop DP HPD handling Sebastian Reichel
2026-06-26 20:55 ` [PATCH v8 19/29] phy: rockchip: usbdp: Rename mode_change to phy_needs_reinit Sebastian Reichel
2026-06-26 20:55 ` [PATCH v8 20/29] phy: rockchip: usbdp: Re-init the PHY on orientation change Sebastian Reichel
2026-06-26 21:18 ` sashiko-bot
2026-06-26 20:55 ` [PATCH v8 21/29] phy: rockchip: usbdp: Factor out lane_mux_sel setup Sebastian Reichel
2026-06-26 20:55 ` [PATCH v8 22/29] phy: rockchip: usbdp: Properly handle TYPEC_STATE_SAFE and TYPEC_STATE_USB Sebastian Reichel
2026-06-26 20:55 ` [PATCH v8 23/29] phy: rockchip: usbdp: Use guard functions for mutex Sebastian Reichel
2026-06-26 20:55 ` [PATCH v8 24/29] phy: rockchip: usbdp: Support going from DP-only mode to USB mode Sebastian Reichel
2026-06-26 21:17 ` sashiko-bot
2026-06-26 20:55 ` [PATCH v8 25/29] phy: rockchip: usbdp: Clear USB status on PHY exit Sebastian Reichel
2026-06-26 21:17 ` sashiko-bot
2026-06-26 20:55 ` [PATCH v8 26/29] phy: rockchip: usbdp: Hold mutex in DP PHY configure Sebastian Reichel
2026-06-26 20:55 ` [PATCH v8 27/29] phy: rockchip: usbdp: Add some extra debug messages Sebastian Reichel
2026-06-26 20:55 ` [PATCH v8 28/29] phy: rockchip: usbdp: Avoid xHCI SErrors Sebastian Reichel
2026-06-26 21:24 ` sashiko-bot
2026-06-26 20:55 ` [PATCH v8 29/29] phy: rockchip: usbdp: Disable USB3 on probe Sebastian Reichel
2026-06-26 21:24 ` sashiko-bot
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