Re: [PATCH RFC v5 07/12] clk: zte: Add regmap based clocks

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Trailing semicolon at the end of the `zte_clk_regmap_div_set_rate` function definition.
--

commit 4685e6891643c422560d2af4689a1b287aa1ac18
Author: Stefan Dösinger <stefandoesinger@gmail.com>

clk: zte: Add regmap based clocks

This commit introduces regmap-based gate, divider, and mux clock
implementations for ZTE devices. It adds helper functions to register
these clocks using regmap structures and descriptions.

> diff --git a/drivers/clk/zte/clk-regmap.c b/drivers/clk/zte/clk-regmap.c
> index 7908f1562f639..903998ca95082 100644
> --- a/drivers/clk/zte/clk-regmap.c
> +++ b/drivers/clk/zte/clk-regmap.c
[ ... ]
> +static int zte_clk_regmap_div_set_rate(struct clk_hw *hw, unsigned long rate,
> +				   unsigned long parent_rate)
> +{
> +	struct zte_clk_regmap *clk = to_zte_clk_regmap(hw);
> +	unsigned int val;
> +	int ret;
> +
> +	ret = divider_get_val(rate, parent_rate, NULL, clk->size, 0);
> +	if (ret < 0)
> +		return ret;
> +
> +	val = (unsigned int)ret << clk->shift;
> +	return regmap_update_bits(clk->map, clk->reg, clk_div_mask(clk->size) << clk->shift, val);
> +};

[Severity: Low]
This isn't a bug, but there is an unnecessary trailing semicolon at the end of
this function definition.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260628-zx29clk-v5-0-79ff044e4192@gmail.com?part=7