Re: [PATCH v2 2/4] arm64: dts: ti: var-som-am62p: update audio codec configuration

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The DMIC configuration is incomplete; it configures the DMIC clock but omits the corresponding DMIC data input pin properties, rendering the digital microphone path non-functional.
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commit 44edbb6a5df165de90ef2fca3bdea4c204ee25b6
Author: Stefano Radaelli <stefano.r@variscite.com>
Subject: arm64: dts: ti: var-som-am62p: update audio codec configuration

This commit updates the WM8904 audio codec configuration on the VAR-SOM-AM62P
board. It sets the audio reference clock rate to 12 MHz and adds the codec DRC,
GPIO, and DMIC configurations required by the board.

> diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi
> index ca2483a04b9d9..8a8dec80cb30e 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi

[ ... ]

> @@ -203,6 +203,23 @@ wm8904: audio-codec@1a {
>  		DBVDD-supply = <&reg_3v3>;
>  		DCVDD-supply = <&reg_1v8>;
>  		MICVDD-supply = <&reg_1v8>;
> +		wlf,drc-cfg-names = "default", "peaklimiter", "tradition",
> +				    "soft", "music";
> +		/*
> +		 * Config registers per name, respectively:
> +		 * KNEE_IP = 0,   KNEE_OP = 0,     HI_COMP = 1,   LO_COMP = 1
> +		 * KNEE_IP = -24, KNEE_OP = -6,    HI_COMP = 1/4, LO_COMP = 1
> +		 * KNEE_IP = -42, KNEE_OP = -3,    HI_COMP = 0,   LO_COMP = 1
> +		 * KNEE_IP = -45, KNEE_OP = -9,    HI_COMP = 1/8, LO_COMP = 1
> +		 * KNEE_IP = -30, KNEE_OP = -10.5, HI_COMP = 1/4, LO_COMP = 1
> +		 */
> +		wlf,drc-cfg-regs = /bits/ 16 <0x01af 0x3248 0x0000 0x0000>,
> +				   /bits/ 16 <0x04af 0x324b 0x0010 0x0408>,
> +				   /bits/ 16 <0x04af 0x324b 0x0028 0x0704>,
> +				   /bits/ 16 <0x04af 0x324b 0x0018 0x078c>,
> +				   /bits/ 16 <0x04af 0x324b 0x0010 0x050e>;
> +		/* GPIO1 = DMIC_CLK, don't touch others */
> +		wlf,gpio-cfg = <0x0018>, <0xffff>, <0xffff>, <0xffff>;

[Severity: Medium]
Will this introduce a regression where the digital microphone path is left
non-functional?

The patch configures GPIO1 to output the DMIC clock, but appears to omit the
required DMIC data input properties like wlf,in1l-as-dmicdat1 or
wlf,in1r-as-dmicdat2.

Looking at the wm8904_handle_dmic_pdata() probe routine, if both data inputs
are missing from the device tree, the driver explicitly disables the DMIC
core by clearing the WM8904_DMIC_ENA_MASK flag.

Because the DMIC core is disabled, the hardware holds the DMIC_CLK output
low entirely on GPIO1, which prevents the microphone from working.

Could this regression be prevented by adding the corresponding data input
pin properties so the codec driver leaves the DMIC core enabled?

>  	};
>  };

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Sashiko AI review · https://sashiko.dev/#/patchset/cover.1782680023.git.stefano.r@variscite.com?part=2