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Mon, 29 Jun 2026 05:42:32 -0700 (PDT) From: Jerome Brunet Date: Mon, 29 Jun 2026 14:42:06 +0200 Subject: [PATCH v2 2/6] clk: sunxi-ng: sun6i-rtc: clean up DT usage Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260629-a733-rtc-v2-2-7b72112784f8@baylibre.com> References: <20260629-a733-rtc-v2-0-7b72112784f8@baylibre.com> In-Reply-To: <20260629-a733-rtc-v2-0-7b72112784f8@baylibre.com> To: Junhui Liu , Alexandre Belloni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Maxime Ripard Cc: linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Jerome Brunet X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2634; 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fpr=F29F26CF27BAE1A9719AE6BDC3C92AAF3E60AED9 With sun6i-rtc compatible devices, the "ext-osc32k" clock input is optional for the devices that support this input (r329 and onward). Probably preparing for older SoC support, the driver does something funny when parsing DT. It check if "ext-osc32k" is present in the clock-names and if it is not, it uses the first clock as "ext-osc32k". This clock will actually be the rtc bus clock so what the driver does is wrong. At the moment, the driver does not support the older SoCs that would have an external 32k clock provided on index #0 so just remove this quirk. Signed-off-by: Jerome Brunet --- drivers/clk/sunxi-ng/ccu-sun6i-rtc.c | 23 +++-------------------- 1 file changed, 3 insertions(+), 20 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun6i-rtc.c b/drivers/clk/sunxi-ng/ccu-sun6i-rtc.c index f6bfeba009e8..0f528bfaed00 100644 --- a/drivers/clk/sunxi-ng/ccu-sun6i-rtc.c +++ b/drivers/clk/sunxi-ng/ccu-sun6i-rtc.c @@ -191,10 +191,8 @@ static struct ccu_common iosc_32k_clk = { CLK_GET_RATE_NOCACHE), }; -static const struct clk_hw *ext_osc32k[] = { NULL }; /* updated during probe */ - -static SUNXI_CCU_GATE_HWS(ext_osc32k_gate_clk, "ext-osc32k-gate", - ext_osc32k, 0x0, BIT(4), 0); +static SUNXI_CCU_GATE_FW(ext_osc32k_gate_clk, "ext-osc32k-gate", + "ext-osc32k", 0x0, BIT(4), 0); static const struct clk_hw *osc32k_parents[] = { &iosc_32k_clk.hw, @@ -352,7 +350,6 @@ MODULE_DEVICE_TABLE(of, sun6i_rtc_ccu_match); int sun6i_rtc_ccu_probe(struct device *dev, void __iomem *reg) { const struct sun6i_rtc_match_data *data; - struct clk *ext_osc32k_clk = NULL; const struct of_device_id *match; /* This driver is only used for newer variants of the hardware. */ @@ -363,21 +360,7 @@ int sun6i_rtc_ccu_probe(struct device *dev, void __iomem *reg) data = match->data; have_iosc_calibration = data->have_iosc_calibration; - if (data->have_ext_osc32k) { - const char *fw_name; - - /* ext-osc32k was the only input clock in the old binding. */ - fw_name = of_property_present(dev->of_node, "clock-names") - ? "ext-osc32k" : NULL; - ext_osc32k_clk = devm_clk_get_optional(dev, fw_name); - if (IS_ERR(ext_osc32k_clk)) - return PTR_ERR(ext_osc32k_clk); - } - - if (ext_osc32k_clk) { - /* Link ext-osc32k-gate to its parent. */ - *ext_osc32k = __clk_get_hw(ext_osc32k_clk); - } else { + if (!data->have_ext_osc32k) { /* ext-osc32k-gate is an orphan, so do not register it. */ sun6i_rtc_ccu_hw_clks.hws[CLK_EXT_OSC32K_GATE] = NULL; osc32k_init_data.num_parents = 1; -- 2.47.3