From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A081A3839B8; Tue, 30 Jun 2026 09:37:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782812277; cv=none; b=EXYJFWhS5yVpp1SaDHOEjo48NTRt0VuOwu36MnXd309ie9EDFdWcm6hv3WQ5ZU3eVRfrTXH6566RJJ30VE2gdo7DilWydyarNnskd95NfTK25VBG9p/oTyzR7iPlhFDXKf4WdLytjLhwTbipiWuOmiPgJzPuU50XF/4tA2MGdm0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782812277; c=relaxed/simple; bh=VYa8ctdp7N3lTNfwD0/Ow13u6f6KsP6v25kYxxUXsQU=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=GmQ5/1i5XZNFnxUZTiKK6oAaNVUeQ/D2gxOU4kdnm9M3y4r7UkNavLCxeikK4a0C9cgCT8aqZRa5lyOtUSKjge4lDqSAsK+znvzfBxuu/P8SJqEzoVpvA2OxJMmnhBeFBndvqgJlD2DAbpFyl1yfaND/lMofC6vGIyXw7w0lV5U= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=pt6OTVoU; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="pt6OTVoU" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1782812276; x=1814348276; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=VYa8ctdp7N3lTNfwD0/Ow13u6f6KsP6v25kYxxUXsQU=; b=pt6OTVoUCoboe0wHFnLBM+Iuqv78I5o+DsM+B5faaUWOMBblKYyxCIkW rCMzjGZYmW8HK0KCDqFlreM5hQebMUCCX6+m/+QTrXNyiw0g5F/EsLnwJ NEAUu3aMY6xXVdHRG394KyK7KfSFhluug+fPac3vJAzV0PiuHUBR74f+a Ezer0Xud3kZeJk1dhThKuOouHszsXU8fAVbxNthtESKVTlZvL+vB9/nCC 2Je8AM0dqwxOXlbgNKs3x9xsDMN00AaT+xvdJIpM4W6rwBkUEqAvwe8Ke 4qnPp5QAWwK1PL5E7p3HzEqRDYcvs7at08AC2lK6TWSn/awsOxjNEXnHs A==; X-CSE-ConnectionGUID: r7IxPp4ATMyUQX/fgWZgwQ== X-CSE-MsgGUID: mG5scDYFQJCBfGSDZZww/w== X-IronPort-AV: E=Sophos;i="6.24,233,1774335600"; d="scan'208";a="59032695" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jun 2026 02:37:55 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex4.mchp-main.com (10.10.87.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.43; Tue, 30 Jun 2026 02:37:55 -0700 Received: from che-ll-i67070.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Tue, 30 Jun 2026 02:37:46 -0700 From: Varshini Rajendran To: , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v3 08/13] ARM: dts: microchip: sama7d65: Add ADC node Date: Tue, 30 Jun 2026 15:05:58 +0530 Message-ID: <20260630093603.38663-9-varshini.rajendran@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260630093603.38663-1-varshini.rajendran@microchip.com> References: <20260630093603.38663-1-varshini.rajendran@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Add node for the ADC controller in sama7d65 SoC. Add the vddout25 fixed regulator node which provides the 2.5V reference voltage for the ADC. Signed-off-by: Varshini Rajendran --- arch/arm/boot/dts/microchip/sama7d65.dtsi | 29 +++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi index 94d49e20dc79..ba775459a816 100644 --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -95,6 +96,16 @@ slow_xtal: clock-slowxtal { }; }; + vddout25: fixed-regulator-vddout25 { + compatible = "regulator-fixed"; + + regulator-name = "VDDOUT25"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-boot-on; + status = "disabled"; + }; + ns_sram: sram@100000 { compatible = "mmio-sram"; reg = <0x100000 0x20000>; @@ -296,6 +307,24 @@ can4: can@e0838000 { status = "disabled"; }; + adc: adc@e1000000 { + compatible = "microchip,sama7d65-adc"; + reg = <0xe1000000 0x200>; + interrupts = ; + clocks = <&pmc PMC_TYPE_GCK 25>; + assigned-clocks = <&pmc PMC_TYPE_GCK 25>; + assigned-clock-rates = <100000000>; + clock-names = "adc_clk"; + dmas = <&dma0 AT91_XDMAC_DT_PERID(0)>; + dma-names = "rx"; + atmel,min-sample-rate-hz = <200000>; + atmel,max-sample-rate-hz = <20000000>; + atmel,trigger-edge-type = ; + atmel,startup-time-ms = <4>; + #io-channel-cells = <1>; + status = "disabled"; + }; + dma2: dma-controller@e1200000 { compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma"; reg = <0xe1200000 0x1000>; -- 2.34.1