From: Richard Fitzgerald <rf@opensource.cirrus.com>
To: mturquette@baylibre.com, sboyd@kernel.org, bmasney@redhat.com,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, patches@opensource.cirrus.com
Subject: [PATCH v6 1/3] dt-bindings: clock: cs2600: Add support for the CS2600
Date: Tue, 30 Jun 2026 16:55:47 +0100 [thread overview]
Message-ID: <20260630155549.824059-2-rf@opensource.cirrus.com> (raw)
In-Reply-To: <20260630155549.824059-1-rf@opensource.cirrus.com>
From: Paul Handrigan <paulha@opensource.cirrus.com>
Add device tree schema for the Cirrus Logic CS2600 clock generator.
The majority of the schema is typical clock, power and I2C
properties.
Passes dt_binding_check:
make dt_binding_check DT_SCHEMA_FILES=clock/cirrus,cs2600.yaml
SCHEMA Documentation/devicetree/bindings/processed-schema.json
CHKDT ./Documentation/devicetree/bindings
LINT ./Documentation/devicetree/bindings
STYLE ./Documentation/devicetree/bindings
DTEX Documentation/devicetree/bindings/clock/cirrus,cs2600.example.dts
DTC [C] Documentation/devicetree/bindings/clock/cirrus,cs2600.example.dtb
Signed-off-by: Paul Handrigan <paulha@opensource.cirrus.com>
Co-developed-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
---
Changes in V6:
- Fixed clock naming in descriptions to match datasheet.
- Fixed clock-names property values to match datasheet names.
- Added cirrus,internal-oscillator boolean to flag that the internal
oscillator is the clock source. Previously the driver inferred this
if clock-names did not contain "ref_clk_in", but this made it difficult
to enforce dts correctness because there was no way to tell whether
ref_clk_in was intentionally or accidentally missing.
- Changed the cirrus,clock-mode enum property into two booleans, since
effectively it was two separate features masquerading as an enum:
- cirrus,smart-mode present to enable smart mode.
- cirrus,smart-mode-clkin-only to enable a feature where the output will
be suppressed until both input clocks are present.
- Changes to cirrus,aux-output-source property:
- Renamed to cirrus,aux1-output-source because it's for the AUX1 pin.
- Added more options.
- Renamed the "no_clkin" option to "clkin_missing".
- Reformatted the description as a list instead of one long sentence.
- Changed clock-names from an enum to an ordered list of const.
This implicitly ensures ref_clk_in is always required.
- Added properties to invert bclk and fsync outputs.
- Added property cirrus,fsync-duty-cycles.
- Added #clock-cells and vdd-supply to the list of required properies.
- Rewritten description description section.
- Reordered the property list to put common properties before custom
cirrus properties.
- Added more examples.
- Added header file to define the clock indexes for DT consumers of the
CS2600 clocks.
Note:
V5 was Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
but I haven't carried this forward because the changes in V6 are large.
Changes in V5:
- Change dt-binding to dt-bindings in commit message
- Add minItems to clocks
- Remove unneeded comments for the cirrus,aux-output-source enums
Changes in V4:
- Change DT description to add more detail.
- Move reg property to keep consistant with the required list.
- Add enum to string DT inputs and change the input values to lower case.
- Change unevaluatedProperties to additionalProperties
Changes in V3:
- Changed clock-names in device tree to an enum since the both clocks
are not always required.
- Changed cirrus,aux-output-source to a string input.
- Added cirrus,clock-mode as a string input.
- Fixed ordering in DT example.
- Removed dt-bindings .h file.
Changes in V2:
- Remove | from after "description" in DT binding.
- Remove description from "clocks" in DT binding.
- Change ref_clk to xti
- Clarify auxiliary clock pin
- Change DT example to not have "reg" for the bus
- Change DT example to change i2c@0 to i2c
- Remove "OUTPUT" from the clock ouputs in the dt binding include file.
.../bindings/clock/cirrus,cs2600.yaml | 262 ++++++++++++++++++
MAINTAINERS | 7 +
.../dt-bindings/clock/cirrus,cs2600-clock.h | 18 ++
3 files changed, 287 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/cirrus,cs2600.yaml
create mode 100644 include/dt-bindings/clock/cirrus,cs2600-clock.h
diff --git a/Documentation/devicetree/bindings/clock/cirrus,cs2600.yaml b/Documentation/devicetree/bindings/clock/cirrus,cs2600.yaml
new file mode 100644
index 000000000000..5f7da2ba87a0
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/cirrus,cs2600.yaml
@@ -0,0 +1,262 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/cirrus,cs2600.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus Logic Fractional-N Clock Synthesizer & Clock Multiplier
+
+maintainers:
+ - patches@opensource.cirrus.com
+
+description: |
+ The CS2600 is a system-clocking device that enables frequency synthesis
+ and clock generation from a stable timing reference clock. The device can
+ generate low-jitter clocks from a noisy clock reference at frequencies as
+ low as 50 Hz. The CS2600 has two clock inputs: REF_CLK_IN and CLK_IN.
+ REF_CLK_IN can be either a crystal or an external clock source.
+ REF_CLK_IN is always required to clock the PLL. Either REF_CLK_IN or
+ CLK_IN can be used as the reference frequency from which the output
+ frequency is derived.
+
+ The clock tree of the CS2600 is:
+
+ +------------+
+ REF_CLK_IN ----| Hybrid PLL | PLL_OUT +--------+
+ | + FLL |-----+------| GATE |--------- CLK_OUT
+ CLK_IN ----| | | +--------+
+ +------------+ |
+ | +---------+
+ +------| DIVIDER |-------- BCLK_OUT
+ | +---------+
+ |
+ | +---------+
+ +------| DIVIDER |-------- FSYNC_OUT
+ +---------+
+
+ Clock output names are defined in <dt-bindings/clock/cirrus,cs2600-clock.h>
+
+properties:
+ compatible:
+ enum:
+ - cirrus,cs2600
+
+ reg:
+ maxItems: 1
+
+ '#clock-cells':
+ const: 1
+
+ clocks:
+ minItems: 1
+ maxItems: 2
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: ref_clk_in
+ - const: clk_in
+
+ vdd-supply:
+ description: Power Supply
+
+ clock-output-names:
+ maxItems: 4
+ description:
+ Names for the output clocks corresponding to PLL_OUT, CLK_OUT,
+ BCLK_OUT and FSYNC_OUT.
+
+ cirrus,aux1-output-source:
+ description: |
+ Selects the signal routed to the AUX1_OUT pin:
+ - "ref_clk_in" the clock on REF_CLK_IN
+ - "clk_in" the clock on CLK_IN
+ - "phase_unlock" indicate the input and output clocks are not in phase,
+ - "freq_unlock" indicate the PLL is unlocked,
+ - "clkin_missing" indicate no clock present at clk_in pin.
+ $ref: /schemas/types.yaml#/definitions/string
+ enum:
+ - ref_clk_in
+ - clk_in
+ - phase_unlock
+ - freq_unlock
+ - clkin_missing
+ default: ref_clk_in
+
+ cirrus,internal-oscillator:
+ description:
+ Use the internal oscillator as the source of REF_CLK_IN. The clocks
+ and clock-names properties must provide a fixed-rate clock of exactly
+ 12000000 Hz as the ref_clk_in clock.
+ type: boolean
+
+ cirrus,smart-mode:
+ description:
+ Use REF_CLK_IN as the frequency reference until CLK_IN is present,
+ with a glitchless switch to CLK_IN as the frequency reference when
+ CLK_IN is present.
+ type: boolean
+
+ cirrus,smart-mode-clkin-only:
+ description:
+ In Smart Mode keep PLL_OUT disabled until there is clock on CLK_IN.
+ type: boolean
+
+ cirrus,bclk-invert:
+ description:
+ Invert the BCLK output.
+ type: boolean
+
+ cirrus,fsync-invert:
+ description:
+ Invert the FSYNC output.
+ type: boolean
+
+ cirrus,fsync-duty-cycles:
+ description:
+ FSYNC output duty. The number of BCLK cycles that FSYNC is asserted.
+ If not present the duty is 50%.
+ This is determined by the type of audio port that is being clocked.
+ For example TDM formats typically define FSYNC is a pulse of 1 BCLK
+ at the start of a frame.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [ 1, 2, 4, 8, 16, 32 ]
+
+required:
+ - compatible
+ - reg
+ - '#clock-cells'
+ - clocks
+ - clock-names
+ - vdd-supply
+
+allOf:
+ - if:
+ required:
+ - cirrus,smart-mode-clkin-only
+ then:
+ required:
+ - cirrus,smart-mode
+
+ # Require clk_in for smart mode
+ - if:
+ required:
+ - cirrus,smart-mode
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ clock-names:
+ minItems: 2
+
+additionalProperties: false
+
+examples:
+ - |
+ /* Smart mode */
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ clock-controller@2c {
+ compatible = "cirrus,cs2600";
+ reg = <0x2c>;
+ #clock-cells = <1>;
+ clocks = <&xtl_clk>, <&sync_clock>;
+ clock-names = "ref_clk_in", "clk_in";
+ vdd-supply = <&vreg>;
+ cirrus,smart-mode;
+ };
+ };
+
+ - |
+ /* Smart mode with PLL_OUT suppressed until CLK_IN is available */
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ clock-controller@2c {
+ compatible = "cirrus,cs2600";
+ reg = <0x2c>;
+ #clock-cells = <1>;
+ clocks = <&xtl_clk>, <&sync_clock>;
+ clock-names = "ref_clk_in", "clk_in";
+ vdd-supply = <&vreg>;
+ cirrus,smart-mode;
+ cirrus,smart-mode-clkin-only;
+ };
+ };
+
+ - |
+ /* Manual mode using only internal oscillator */
+ intosc_clk: intosc-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <12000000>;
+ };
+
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ clock-controller@2c {
+ compatible = "cirrus,cs2600";
+ reg = <0x2c>;
+ #clock-cells = <1>;
+ clocks = <&intosc_clk>;
+ clock-names = "ref_clk_in";
+ vdd-supply = <&vreg>;
+ cirrus,internal-oscillator;
+ };
+ };
+
+ - |
+ /* Manual mode using internal oscillator and external clk_in */
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ clock-controller@2c {
+ compatible = "cirrus,cs2600";
+ reg = <0x2c>;
+ #clock-cells = <1>;
+ clocks = <&intosc_clk>, <&sync_clock>;
+ clock-names = "ref_clk_in", "clk_in";
+ vdd-supply = <&vreg>;
+ cirrus,internal-oscillator;
+ };
+ };
+
+ - |
+ /* Invert FSYNC output clock */
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ clock-controller@2c {
+ compatible = "cirrus,cs2600";
+ reg = <0x2c>;
+ #clock-cells = <1>;
+ clocks = <&intosc_clk>, <&sync_clock>;
+ clock-names = "ref_clk_in", "clk_in";
+ vdd-supply = <&vreg>;
+ cirrus,fsync-invert;
+ };
+ };
+
+ - |
+ /* Change FSYNC duty */
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ clock-controller@2c {
+ compatible = "cirrus,cs2600";
+ reg = <0x2c>;
+ #clock-cells = <1>;
+ clocks = <&intosc_clk>, <&sync_clock>;
+ clock-names = "ref_clk_in", "clk_in";
+ vdd-supply = <&vreg>;
+ cirrus,fsync-duty-cycles = <1>;
+ };
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 15011f5752a9..fc91c4389237 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6213,6 +6213,13 @@ F: sound/hda/codecs/side-codecs/cs*
F: sound/hda/codecs/side-codecs/hda_component*
F: sound/soc/codecs/cs*
+CIRRUS LOGIC CLOCK DRIVERS
+M: patches@opensource.cirrus.com
+L: patches@opensource.cirrus.com
+S: Supported
+F: Documentation/devicetree/bindings/clock/cirrus,cs2600*
+F: include/dt-bindings/clock/cirrus,cs2600*
+
CIRRUS LOGIC HAPTIC DRIVERS
M: James Ogletree <jogletre@opensource.cirrus.com>
M: Fred Treven <fred.treven@cirrus.com>
diff --git a/include/dt-bindings/clock/cirrus,cs2600-clock.h b/include/dt-bindings/clock/cirrus,cs2600-clock.h
new file mode 100644
index 000000000000..bde505e17813
--- /dev/null
+++ b/include/dt-bindings/clock/cirrus,cs2600-clock.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause*/
+/*
+ * CS2600 clock driver
+ *
+ * Copyright (C) 2023-2025 Cirrus Logic, Inc. and
+ * Cirrus Logic International Semiconductor Ltd.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_CS2600_H
+#define __DT_BINDINGS_CLOCK_CS2600_H
+
+/* Clock output indexes */
+#define CS2600_PLL_OUT 0
+#define CS2600_CLK_OUT 1
+#define CS2600_BCLK_OUT 2
+#define CS2600_FSYNC_OUT 3
+
+#endif /* __DT_BINDINGS_CLOCK_CS2600_H */
--
2.47.3
next prev parent reply other threads:[~2026-06-30 15:56 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-30 15:55 [PATCH v6 0/3] Cirrus Logic CS2600 clock device Richard Fitzgerald
2026-06-30 15:55 ` Richard Fitzgerald [this message]
2026-07-01 6:48 ` [PATCH v6 1/3] dt-bindings: clock: cs2600: Add support for the CS2600 Krzysztof Kozlowski
2026-07-01 8:59 ` Richard Fitzgerald
2026-06-30 15:55 ` [PATCH v6 2/3] clk: cs2600: Add Fractional-N clock driver Richard Fitzgerald
2026-06-30 16:11 ` sashiko-bot
2026-07-01 9:38 ` Richard Fitzgerald
2026-06-30 16:59 ` Uwe Kleine-König
2026-06-30 15:55 ` [PATCH v6 3/3] clk: cs2600: Add KUnit test for CS2600 driver Richard Fitzgerald
2026-06-30 16:14 ` sashiko-bot
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