From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9C30D3D667D; Tue, 30 Jun 2026 16:44:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782837849; cv=none; b=lU5p+jLVbKHFGUq+Ka3UqJdkmuiOMPAQnKd5xkfmh3UnKAk5g95cZVHXTn2Vl+Z3Xr6nhlQ7NZT9/8CWQzTl9QqGHMZkJNh5zi2HEetrIFZkG2DGjbMgnira2af67VkSyH8kUAWurFPgUWeS4P+0mZO+GALTHbqTSgDl2of45Ww= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782837849; c=relaxed/simple; bh=TUeEks+aAoUeUvvBgRJnu8qgxRKPdjvvzCb4ddzTcVI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mUK7tV5aB1wW/z8gRYboQuC0mQRSwJJ1ZOKg+VAjVSrieE/NXXjm5h+goMyb4xirhCxju5XljE31KC5DvzWSnKqJK6SgiatgBTrsGzrjstrScyGUImRmGE62QCKv+i8YIK9L9TwORuugHt3Su6cO9KRLpqv7WBQtmmTwzWNej/Y= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=qXRwduQk; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="qXRwduQk" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=52PHcV9omVEm3bSV/8oo19lgyN28ujPP92D8HygTz8M=; b=qXRwduQkyhCanl9khpEV3tX2R4 nx3N+M6659TkzEg/FULsjdst8z0TRxMRCzvXfjmZGS34Q/ASvN7Mh58AEfdEXZXx+jhBZ4+wWKWKB 64TUOwqhUfXGjS3UibZG1bzIU/UtayJtpusOUzR1E63RwajuwKA9YA9ueMmgyZRxlhiFTOCTYCqjN xV2zf+VyqJPjL81C5XsD2SROR3BGdiW4eZDMizPdVju68CvT8SJ5QFqMe2jj8tjuUOFKYfO2e3HF/ ADWWMPTQiax6WtFvcm6tnFcl1nYG2AvPc/iTsqe8DF8606QNJpvVWXI1F/zAJ8VqpKLMbgBp2g7hi 2M/qn2Qw==; From: Heiko Stuebner To: mkl@pengutronix.de, mailhol@kernel.org Cc: kernel@pengutronix.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, shawn.lin@rock-chips.com, linux-can@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, quentin.schulz@cherry.de, zhangqing@rock-chips.com, Heiko Stuebner Subject: [PATCH 5/6] arm64: dts: rockchip: Add RK3588 CAN controller nodes Date: Tue, 30 Jun 2026 18:43:35 +0200 Message-ID: <20260630164336.3444550-6-heiko@sntech.de> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260630164336.3444550-1-heiko@sntech.de> References: <20260630164336.3444550-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Heiko Stuebner The RK3588 has 3 CAN controllers, so add the core nodes for them. Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 39 +++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi index fc1fdbfd3162..ba82e2f057d2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi @@ -2648,6 +2648,45 @@ dmac1: dma-controller@fea30000 { #dma-cells = <1>; }; + can0: can@fea50000 { + compatible = "rockchip,rk3588-canfd"; + reg = <0x0 0xfea50000 0x0 0x1000>; + interrupts = ; + clocks = <&cru CLK_CAN0>, <&cru PCLK_CAN0>; + clock-names = "baud", "pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&can0m0_pins>; + resets = <&cru SRST_CAN0>, <&cru SRST_P_CAN0>; + reset-names = "can", "apb"; + status = "disabled"; + }; + + can1: can@fea60000 { + compatible = "rockchip,rk3588-canfd"; + reg = <0x0 0xfea60000 0x0 0x1000>; + interrupts = ; + clocks = <&cru CLK_CAN1>, <&cru PCLK_CAN1>; + clock-names = "baud", "pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&can1m0_pins>; + resets = <&cru SRST_CAN1>, <&cru SRST_P_CAN1>; + reset-names = "can", "apb"; + status = "disabled"; + }; + + can2: can@fea70000 { + compatible = "rockchip,rk3588-canfd"; + reg = <0x0 0xfea70000 0x0 0x1000>; + interrupts = ; + clocks = <&cru CLK_CAN2>, <&cru PCLK_CAN2>; + clock-names = "baud", "pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&can2m0_pins>; + resets = <&cru SRST_CAN2>, <&cru SRST_P_CAN2>; + reset-names = "can", "apb"; + status = "disabled"; + }; + i2c1: i2c@fea90000 { compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c"; reg = <0x0 0xfea90000 0x0 0x1000>; -- 2.47.3