From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0E7454279F9; Wed, 1 Jul 2026 23:35:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782948961; cv=none; b=WMbpb6crQA0iN26Z4RfNA+69ksnlAzaPydaDBlLuzuyLL8+MvPnsSL2gpPnnA09E/4o/NMJQQ8KJ54bHHDaX+6BzW+hPGzCUmhb7AUHp7Du1qg0aapRWJhlGuSncVJqxOSmgJuaJAZiAKTtW3xu95IF08RxktxaxV7o8hO2N8fI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782948961; c=relaxed/simple; bh=myM2kDdC+o9qU/R8uVpBsqVAxMREJkYJoXrUM6Jce8E=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ZT/NT9aRr5suv7+iSm1Lfo6UQsZoL9gQLL53pF7qXqjE9o0A750Qlg9Wz8hNYehJzRXjMfNfMeM7TP19ausd0z2qrYUylOsjAorjjA2m+2KZbHEd4xa19+QGuwoSS/IUzNNYjvxSYFK5gA39WpX9UV/Tn6f1mrtjzJV/mnqDPPs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=l86FlR/B; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="l86FlR/B" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1782948950; bh=myM2kDdC+o9qU/R8uVpBsqVAxMREJkYJoXrUM6Jce8E=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=l86FlR/Bi2GDtRDYGqVw3WD4OyyrERDHhIF980zAVf+zasaJ2wD5ovqWzEgKwSXLv LsQcrAbt9fWMl3xUtm7FgqP6nBdLA9PDZ1eW8BKOyV47Xf9ieVtKQllnTjvmzm681N rqB7aCeUQ3SPvJLYYQaLjTwl1QC4XjzA7jxvJk+Dlv+g7Hd85ixtMWHC9Wut5rBrYM QPt8DrZJuewyQW5ZhBkUta0RDmUaMK0jJCzrKaQ6BJZn8HW2zv6HKTnGorw9W11Rtx +0PzjNY/3q9kYqPeLxUHTofYOAIT9Ha0bFFqj5M3VE+SJkmgEwULKhxK30BDK1ELgF zxBHaIeuZKu4A== Received: from jupiter.universe (unknown [100.64.1.62]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) (Authenticated sender: sre) by bali.collaboradmins.com (Postfix) with ESMTPSA id 38C5B17E3602; Thu, 2 Jul 2026 01:35:50 +0200 (CEST) Received: by jupiter.universe (Postfix, from userid 1000) id DF10F480079; Thu, 02 Jul 2026 01:35:48 +0200 (CEST) From: Sebastian Reichel Date: Thu, 02 Jul 2026 01:36:12 +0200 Subject: [PATCH v9 34/38] phy: rockchip: usbdp: Rename mode to hw_mode Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260702-rockchip-usbdp-cleanup-v9-34-e31efbb62d2e@collabora.com> References: <20260702-rockchip-usbdp-cleanup-v9-0-e31efbb62d2e@collabora.com> In-Reply-To: <20260702-rockchip-usbdp-cleanup-v9-0-e31efbb62d2e@collabora.com> To: Vinod Koul , Neil Armstrong , Heiko Stuebner , Frank Wang , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thinh Nguyen , Greg Kroah-Hartman Cc: Andy Yan , Dmitry Baryshkov , Yubing Zhang , Alexey Charkov , linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, Sebastian Reichel X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=6709; i=sebastian.reichel@collabora.com; h=from:subject:message-id; bh=myM2kDdC+o9qU/R8uVpBsqVAxMREJkYJoXrUM6Jce8E=; b=owJ4nAFtApL9kA0DAAoB2O7X88g7+poByyZiAGpFpFRnyZXbpi51tAIRAlLhy0cPl/Gy8v32X Q9dAwfSfXxN3YkCMwQAAQoAHRYhBO9mDQdGP4tyanlUE9ju1/PIO/qaBQJqRaRUAAoJENju1/PI O/qaH9YP/itITf812DSkAla90r9Ht2ZOVCckKgPZcS1dJfbAAeqh2EyQjjfhiUWvroa+V68KYIq KIWPCVVMAgbO9ZeMafKebQbLQjjKHN9Udu1kpj1V6G1XxUnAGYEr+pA8dPQjVkXvOhZmyh27PPQ 4kcIHJOvg5VBgxAtJLdipbRNTqg+j1LhN4ZeJVTUaTOoeyrqkusiEyrOk/W8EAHzdeqoh2hBBAU jrSyf/oJ/m/0UqYXI8joTi+Z/SXQFnQFBooiWkMjdIcKzqznVZShhn5WmjuMTgkcTsFVYp3bBvn tK4Mtn3HZcycyZBTtb2NhACIBlErOigVLL7uLgnyyHvmMQw/T08/z+RjUEvJIT8wUkdvmtpQQ9q HGwlTbHiz+etvMaFeTNBOddUFrQf5Wp0PCv6H/XgLyFaPNfDPHln6nE52yISmIRdQqNVQVXF0TW nUla2Jcis2BBXPutkPUl8OD/TH2y7MkRqV3erme/jC+hzvQk/jO/mwNLJX3lSyatqOYps/eTpeo b9D5V4c99GrlBS+ROQhbg7lkOOyEXVvHXnTjZn4Xh8ohVxfzIRn8F7wFpLs4loD3tejH40VtND4 tKyCI976iV4QlCwZjUrmp2RdJ+E5ClMIZX1gCZYT5vGiNWQ109uC4O7qZbeWsZC+if5oCejd/6O EH3u2tG3LeKvJelj58NcnIA== X-Developer-Key: i=sebastian.reichel@collabora.com; a=openpgp; fpr=EF660D07463F8B726A795413D8EED7F3C83BFA9A Rename mode field to hw_mode to make clear that this is the modes currently supported by the hardware, but not necessarily requested by software. I.e. it is only set by either the USB-C state machine or device-tree if the PHY is used in a fixed routing setup. Signed-off-by: Sebastian Reichel --- drivers/phy/rockchip/phy-rockchip-usbdp.c | 46 +++++++++++++++---------------- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c index ad594bb3962a..a19b048fb39c 100644 --- a/drivers/phy/rockchip/phy-rockchip-usbdp.c +++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c @@ -175,7 +175,7 @@ struct rk_udphy { /* PHY status management */ bool flip; bool phy_needs_reinit; - u8 mode; + u8 hw_mode; /* modes currently supported by hardware */ u8 status; /* utilized for USB */ @@ -585,18 +585,18 @@ static void rk_udphy_dp_lane_enable(struct rk_udphy *udphy, int dp_lanes) CMN_DP_CMN_RSTN, FIELD_PREP(CMN_DP_CMN_RSTN, 0x0)); } -static void rk_udphy_mode_set(struct rk_udphy *udphy, u8 mode) +static void rk_udphy_mode_set(struct rk_udphy *udphy, u8 hw_mode) { - if (udphy->mode == mode) + if (udphy->hw_mode == hw_mode) return; udphy->phy_needs_reinit = true; - udphy->mode = mode; + udphy->hw_mode = hw_mode; } static void rk_udphy_set_typec_state(struct rk_udphy *udphy, unsigned long state) { - u8 mode; + u8 hw_mode; switch (state) { case TYPEC_DP_STATE_C: @@ -605,7 +605,7 @@ static void rk_udphy_set_typec_state(struct rk_udphy *udphy, unsigned long state udphy->lane_mux_sel[1] = PHY_LANE_MUX_DP; udphy->lane_mux_sel[2] = PHY_LANE_MUX_DP; udphy->lane_mux_sel[3] = PHY_LANE_MUX_DP; - mode = UDPHY_MODE_DP; + hw_mode = UDPHY_MODE_DP; udphy->dp_lanes = 4; break; @@ -622,12 +622,12 @@ static void rk_udphy_set_typec_state(struct rk_udphy *udphy, unsigned long state udphy->lane_mux_sel[2] = PHY_LANE_MUX_DP; udphy->lane_mux_sel[3] = PHY_LANE_MUX_DP; } - mode = UDPHY_MODE_DP_USB; + hw_mode = UDPHY_MODE_DP_USB; udphy->dp_lanes = 2; break; } - rk_udphy_mode_set(udphy, mode); + rk_udphy_mode_set(udphy, hw_mode); } static void rk_udphy_set_typec_default_mapping(struct rk_udphy *udphy) @@ -750,7 +750,7 @@ static int rk_udphy_status_check(struct rk_udphy *udphy) int ret; /* LCPLL check */ - if (udphy->mode & UDPHY_MODE_USB) { + if (udphy->hw_mode & UDPHY_MODE_USB) { ret = regmap_read_poll_timeout(udphy->pma_regmap, CMN_ANA_LCPLL_DONE_OFFSET, val, (val & CMN_ANA_LCPLL_AFC_DONE) && (val & CMN_ANA_LCPLL_LOCK_DONE), 200, 100000); @@ -785,15 +785,15 @@ static int rk_udphy_init(struct rk_udphy *udphy) int ret; dev_dbg(udphy->dev, "reinit PHY with USB=%s and DP=%s (%u lanes) flipped=%s\n", - str_enabled_disabled(udphy->mode & UDPHY_MODE_USB), - str_enabled_disabled(udphy->mode & UDPHY_MODE_DP), + str_enabled_disabled(udphy->hw_mode & UDPHY_MODE_USB), + str_enabled_disabled(udphy->hw_mode & UDPHY_MODE_DP), udphy->dp_lanes, str_yes_no(udphy->flip)); rk_udphy_reset_assert_all(udphy); usleep_range(10000, 11000); /* enable rx lfps for usb */ - if (udphy->mode & UDPHY_MODE_USB) + if (udphy->hw_mode & UDPHY_MODE_USB) rk_udphy_grfreg_write(udphy->udphygrf, &cfg->grfcfg.rx_lfps, true); /* Step 1: power on pma and deassert apb rstn */ @@ -830,13 +830,13 @@ static int rk_udphy_init(struct rk_udphy *udphy) FIELD_PREP(CMN_DP_LANE_EN_ALL, 0)); /* Step 4: deassert init rstn and wait for 200ns from datasheet */ - if (udphy->mode & UDPHY_MODE_USB) { + if (udphy->hw_mode & UDPHY_MODE_USB) { ret = rk_udphy_reset_deassert(udphy, "init"); if (ret) goto assert_resets; } - if (udphy->mode & UDPHY_MODE_DP) { + if (udphy->hw_mode & UDPHY_MODE_DP) { regmap_update_bits(udphy->pma_regmap, CMN_DP_RSTN_OFFSET, CMN_DP_INIT_RSTN, FIELD_PREP(CMN_DP_INIT_RSTN, 0x1)); @@ -845,7 +845,7 @@ static int rk_udphy_init(struct rk_udphy *udphy) udelay(1); /* Step 5: deassert cmn/lane rstn */ - if (udphy->mode & UDPHY_MODE_USB) { + if (udphy->hw_mode & UDPHY_MODE_USB) { ret = rk_udphy_reset_deassert(udphy, "cmn"); if (ret) goto assert_resets; @@ -904,7 +904,7 @@ static int rk_udphy_parse_lane_mux_data(struct rk_udphy *udphy) num_lanes = device_property_count_u32(udphy->dev, "rockchip,dp-lane-mux"); if (num_lanes < 0) { dev_dbg(udphy->dev, "no dp-lane-mux, following dp alt mode\n"); - udphy->mode = UDPHY_MODE_USB; + udphy->hw_mode = UDPHY_MODE_USB; return 0; } @@ -933,10 +933,10 @@ static int rk_udphy_parse_lane_mux_data(struct rk_udphy *udphy) } } - udphy->mode = UDPHY_MODE_DP; + udphy->hw_mode = UDPHY_MODE_DP; udphy->dp_lanes = num_lanes; if (num_lanes == 1 || num_lanes == 2) { - udphy->mode |= UDPHY_MODE_USB; + udphy->hw_mode |= UDPHY_MODE_USB; udphy->flip = (udphy->lane_mux_sel[0] == PHY_LANE_MUX_DP) || (udphy->lane_mux_sel[1] == PHY_LANE_MUX_DP); } @@ -1027,7 +1027,7 @@ static int rk_udphy_power_on(struct rk_udphy *udphy, u8 mode) { int ret; - if (!(udphy->mode & mode)) { + if (!(udphy->hw_mode & mode)) { dev_info(udphy->dev, "mode 0x%02x is not support\n", mode); return 0; } @@ -1042,7 +1042,7 @@ static int rk_udphy_power_on(struct rk_udphy *udphy, u8 mode) if (ret) return ret; - if (!udphy->hs && udphy->mode & UDPHY_MODE_USB) + if (!udphy->hs && udphy->hw_mode & UDPHY_MODE_USB) rk_udphy_u3_port_disable(udphy, false); udphy->phy_needs_reinit = false; @@ -1071,7 +1071,7 @@ static int rk_udphy_power_on(struct rk_udphy *udphy, u8 mode) static void rk_udphy_power_off(struct rk_udphy *udphy, u8 mode) { - if (!(udphy->mode & mode)) { + if (!(udphy->hw_mode & mode)) { dev_info(udphy->dev, "mode 0x%02x is not support\n", mode); return; } @@ -1330,7 +1330,7 @@ static int rk_udphy_usb3_phy_init(struct phy *phy) guard(mutex)(&udphy->mutex); /* DP only or high-speed, disable U3 port */ - if (!(udphy->mode & UDPHY_MODE_USB) || udphy->hs) { + if (!(udphy->hw_mode & UDPHY_MODE_USB) || udphy->hs) { rk_udphy_u3_port_disable(udphy, true); return 0; } @@ -1345,7 +1345,7 @@ static int rk_udphy_usb3_phy_exit(struct phy *phy) guard(mutex)(&udphy->mutex); /* DP only or high-speed */ - if (!(udphy->mode & UDPHY_MODE_USB) || udphy->hs) { + if (!(udphy->hw_mode & UDPHY_MODE_USB) || udphy->hs) { udphy->status &= ~UDPHY_MODE_USB; return 0; } -- 2.53.0