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[9.244.8.156]) by smtp.gmail.com with ESMTPSA id af79cd13be357-92e801948a8sm265545285a.35.2026.07.02.10.24.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Jul 2026 10:24:59 -0700 (PDT) From: Enzo Adriano To: Junhui Liu Cc: Andre Przywara , Brian Masney , Michael Turquette , Stephen Boyd , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Richard Cochran , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH RFC 6/8] clk: sunxi-ng: a733: Add mod clocks support Date: Thu, 2 Jul 2026 13:24:56 -0400 Message-ID: <20260702172456.848487-1-enzo.adriano.code@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260310-a733-clk-v1-6-36b4e9b24457@pigmoral.tech> References: <20260310-a733-clk-v1-6-36b4e9b24457@pigmoral.tech> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Hi Junhui, Register check for the mod clocks in this patch against the public A733 User Manual V0.92: 88 of the 94 mod/mux clock entries match the manual's register offsets, with the documented gating/mux/divider layout at each offset. The six that have no register in the public manual are the set already discussed in this thread for provenance notes - avs (0x0880), spi4 (0x0F28), sgpio (0x1060), lpc (0x1080), gmac1-phy (0x1420) - plus one more: tcon-lcd2 (0x1510); the manual only documents VO0_TCONLCD0 (0x1500) and VO0_TCONLCD1 (0x1508). Thanks, Enzo