Re: [PATCH v10 1/3] dt-bindings: pwm: dwc: Document optional resets property

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Missing matching updates for related bindings in the same IP family.
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commit 05dd50c982c598b86944765d91f297a8c37b303e
Author: Xuyang Dong <dongxuyang@eswincomputing.com>

dt-bindings: pwm: dwc: Document optional resets property

This commit updates the DesignWare PWM binding to document two active-low
reset inputs: presetn and timer_N_resetn. It adds the resets property with
two items to describe the function of each reset line.

> diff --git a/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml b/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml
> --- a/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml
> +++ b/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml
> @@ -43,6 +43,11 @@ properties:
>        - const: bus
>        - const: timer
>  
> +  resets:
> +    items:
> +      - description: Interface bus (presetn) reset
> +      - description: PWM timer logic (timer_N_resetn) reset
> +

[Severity: Medium]
The subsystem guidelines note that when a binding has multiple YAML files for
different device types in the same family, related files may need matching
updates. Since the DesignWare APB timer IP is described by both this PWM
binding and the timer binding, does the timer binding also need an update?

Currently, the timer binding restricts the resets property to a single item:

Documentation/devicetree/bindings/timer/snps,dw-apb-timer.yaml:properties:resets
  resets:
    maxItems: 1

Defining both hardware resets for the snps,dw-apb-timer compatible will
cause dt_binding_check to fail due to this inconsistency.

>    snps,pwm-number:
>      $ref: /schemas/types.yaml#/definitions/uint32
>      description: The number of PWM channels configured for this instance

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Sashiko AI review · https://sashiko.dev/#/patchset/20260703093308.482-1-dongxuyang@eswincomputing.com?part=1