Re: [PATCH v4 3/6] iio: dac: ad3530r: Convert sw_ldac_trig_reg to a function pointer

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] Writing to the highest channel (channel 7 on AD3530/R, channel 15 on AD3532/R) fails with -EINVAL because max_register excludes the second byte of the 16-bit DAC value.
--

commit 744847f13949cc21f1d21acc0a27b2cff1da3ef3
Author: Kim Seer Paller <kimseer.paller@analog.com>

iio: dac: ad3530r: Convert sw_ldac_trig_reg to a function pointer

This commit converts the sw_ldac_trig_reg fixed register address into a
function pointer that returns the trigger register for a given channel.
This supports multi-bank register architectures where the trigger
register depends on the channel being updated.

> diff --git a/drivers/iio/dac/ad3530r.c b/drivers/iio/dac/ad3530r.c
> index 9d4545e2c9b33..7841546f0c07b 100644
> --- a/drivers/iio/dac/ad3530r.c
> +++ b/drivers/iio/dac/ad3530r.c

[ ... ]

> @@ -215,7 +225,7 @@ static int ad3530r_dac_write(struct ad3530r_state *st, unsigned int chan,
>  	if (st->ldac_gpio)
>  		return ad3530r_trigger_hw_ldac(st->ldac_gpio);
>  
> -	return regmap_set_bits(st->regmap, st->chip_info->sw_ldac_trig_reg,
> +	return regmap_set_bits(st->regmap, st->chip_info->sw_ldac_trig_reg(chan),
>  			       AD3530R_SLD_TRIG_A);
>  }

[Severity: High]
This is a pre-existing issue, but looking at ad3530r_dac_write(), the
function writes a 16-bit value using regmap_bulk_write() just before
triggering the LDAC:

	ret = regmap_bulk_write(st->regmap, st->chip_info->input_ch_reg(chan),
				&st->buf, sizeof(st->buf));

When writing to the highest channel (channel 7 for AD3530/R, or channel 15
for AD3532/R), the base register address is calculated as 0xF9 or 0x30F9.
Because the DAC value is 2 bytes and val_bits is 8, regmap will try to
write to both 0xF9 and 0xFA (or 0x30F9 and 0x30FA).

However, AD3530R_MAX_REG_ADDR is defined as 0xF9 and AD3532R_MAX_REG_ADDR
is defined as 0x30F9. Does this cause writes to the highest channel to
unconditionally fail with -EINVAL since the second byte's address exceeds
the max_register limit?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260703-iio-ad3532r-support-v4-0-69d9a336f4e8@analog.com?part=3