From: sashiko-bot@kernel.org
To: Avermoal <avermoal@gmail.com>
Cc: devicetree@vger.kernel.org, conor+dt@kernel.org, robh@kernel.org
Subject: Re: [PATCH] dt-bindings: iio: adc: convert Xilinx XADC bindings to YAML
Date: Sun, 05 Jul 2026 06:40:26 +0000 [thread overview]
Message-ID: <20260705064027.308291F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260705063415.33076-1-avermoal@gmail.com>
Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [Medium] Missing conditional requirement for `xlnx,external-mux-channel` when external multiplexer mode is used.
- [Medium] The `reg` property inside `xlnx,channels` child nodes is incorrectly typed as a `uint32` scalar instead of a standard `reg` array.
- [Low] Missing `required` array for `#address-cells` and `#size-cells` under the `xlnx,channels` node.
--
commit b852b5cc7e3eeca9d9136f18bd2b9dbe89f63532
Author: Avermoal <avermoal@gmail.com>
dt-bindings: iio: adc: convert Xilinx XADC bindings to YAML
Convert the Xilinx XADC binding documentation from .txt to YAML format.
This conversion is part of the ongoing effort to migrate all DT bindings
to a machine-verifiable schema.
> diff --git a/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.yaml b/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.yaml
> new file mode 100644
> index 0000000000000..a32b712d8485e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.yaml
[ ... ]
> + xlnx,external-mux-channel:
> + description: |
> + Configures which pair of pins is used to sample data in external mux mode.
> + For single mode: 0 (VP/VN) or 1..16 (VAUXP[0..15]/VAUXN[0..15]).
> + For dual mode: 1..8, where the value n corresponds to the pair
> + (VAUXP[n-1]/VAUXN[n-1] and VAUXP[n+7]/VAUXN[n+7]).
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 16
[Severity: Medium]
Should there be an allOf or if block at the root level to enforce that
xlnx,external-mux-channel is required when xlnx,external-mux is set to single
or dual?
Without it, device trees might omit the mandatory channel configuration and
still pass validation.
> +
> + xlnx,channels:
> + description: |
> + Container for external channels that are connected to the ADC.
> + If this property is not present, no external channels will be assumed.
> + type: object
> + properties:
> + "#address-cells":
> + const: 1
> + "#size-cells":
> + const: 0
[Severity: Low]
Are #address-cells and #size-cells meant to be required here?
The original text binding listed them as required properties for this node, but
they are not enforced in this schema.
> + patternProperties:
> + "^channel@[0-9a-f]+$":
> + type: object
> + description: Each child node represents one external channel.
> + properties:
> + reg:
> + description: |
> + Pair of pins the channel is connected to.
> + 0: VP/VN
> + 1..16: VAUXP[0..15]/VAUXN[0..15]
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 16
[Severity: Medium]
Does this override the standard dt-schema definition of reg as a matrix?
Using a $ref to uint32 here causes a meta-schema conflict that will break
dt_binding_check validation. Should this use maxItems: 1 instead of redefining
the type?
> + xlnx,bipolar:
> + description: If present, the channel is used in bipolar mode.
> + type: boolean
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260705063415.33076-1-avermoal@gmail.com?part=1
next prev parent reply other threads:[~2026-07-05 6:40 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-05 6:34 [PATCH] dt-bindings: iio: adc: convert Xilinx XADC bindings to YAML Avermoal
2026-07-05 6:40 ` sashiko-bot [this message]
2026-07-05 15:42 ` Krzysztof Kozlowski
-- strict thread matches above, loose matches on Subject: below --
2026-07-05 8:53 Avermoal
2026-07-05 15:04 ` Maxwell Doose
2026-07-05 15:42 ` Krzysztof Kozlowski
2026-07-05 16:56 ` Mikhail Lukianchikov
2026-07-05 17:44 ` Maxwell Doose
2026-07-05 23:04 ` Jonathan Cameron
2026-07-06 5:56 ` Krzysztof Kozlowski
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