Re: [PATCH v2 2/2] ARM: dts: aspeed: Add NVIDIA VR-NVL BMC

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The cp2112a and cp2112b USB devices are incorrectly modeled as interface nodes, preventing their device tree properties from being applied.
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commit 19bf252306e94b75647bff8b12082b57f05638b9
Author: Jacky Huang <jackyhuang@nvidia.com>

ARM: dts: aspeed: Add NVIDIA VR-NVL BMC

This commit adds the device tree for the Aspeed AST2600 BMC for NVIDIA's
Vera Rubin NVL compute platform.

Link: https://lore.kernel.org/all/20260629105202.1417679-1-jackyhuang@nvidia.com/

> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-vr-nvl-bmc.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-vr-nvl-bmc.dts
> new file mode 100644
> index 0000000000000..5d17450e4869e
> --- /dev/null
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-vr-nvl-bmc.dts

[ ... ]

> +				device@1 {
> +					reg = <1>;
> +					#address-cells = <2>;
> +					#size-cells = <0>;
> +
> +					cp2112a: interface@1 {
> +						reg = <1 1>;
> +						gpio-controller;
> +						#gpio-cells = <2>;
> +						interrupt-controller;
> +						#interrupt-cells = <2>;
> +					};
> +				};

[Severity: High]
Does this incorrectly nest cp2112a inside an interface@1 node?

The CP2112 is a single-interface USB Class 0 device. According to the USB
device tree bindings and the kernel's usb_of_has_combined_node() logic,
shouldn't this be defined as a standalone device node directly on device@1,
similar to how cp2112c and cp2112g are defined?

By nesting cp2112a inside interface@1 with reg = <1 1> (specifying interface
1 when the CP2112 only has interface 0), it seems the USB subsystem will
fail to match the OF node to the device. Could this cause the
gpio-controller and interrupt-controller properties to be ignored?

[ ... ]

> +				device@1 {
> +					reg = <1>;
> +					#address-cells = <2>;
> +					#size-cells = <0>;
> +
> +					cp2112b: interface@1 {
> +						reg = <1 1>;
> +						gpio-controller;
> +						#gpio-cells = <2>;
> +						interrupt-controller;
> +						#interrupt-cells = <2>;
> +					};
> +				};

[Severity: High]
Are the properties for cp2112b also incorrectly nested in an interface@1
child node here?

Similar to cp2112a above, defining this inside an interface node rather than
directly on device@1 could prevent the USB core from attaching the OF nodes
to the instantiated devices, silently breaking GPIO and interrupt control.

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Sashiko AI review · https://sashiko.dev/#/patchset/20260706101526.2556226-1-jackyhuang@nvidia.com?part=2