From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AACAB3081BE; Tue, 7 Jul 2026 08:02:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783411323; cv=none; b=ozvwTzJBl7usqxteQew6uZXEnKiIbvZkEgigZI6D3kSCYG51zsuRmR1JK3K9JrSbEZF9f+gioxolf0WdI+Bk8cvoY3MO72Po6K+guJlXmcVKIyKMtAaURMl+XhgnShrCdpzMo5MDu4B8jgClwxoLO6kRiT3RTm3JYTj2XN1+/jQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783411323; c=relaxed/simple; bh=6i34TXrX+kdA/DTu0ZpuhXXOwCmx5MrrCS/cnXo0kDw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=KRgvyIslj3VOri+O48+UOcOK6ppOiK9vTtDfvPOV7L+SL67QUJ3NfESvTuRu8kmdvGYgvOi5gI7rxfJCHUZOvkLxESRwkVAMTJMAz88Q3+je9fSTnYWDy0/EROBS7HOAcQ1UpUtSy/nyvGDP6PSb4s+BEC8ML1FsxaxPTays9oE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=0UtLoTM/; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="0UtLoTM/" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 89A694E40CCE; Tue, 7 Jul 2026 08:01:59 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 5C38D601A3; Tue, 7 Jul 2026 08:01:59 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 824C711BC0D35; Tue, 7 Jul 2026 10:01:56 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1783411318; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=qWeUXwh4eP/aMY5SZXD4udzhGkVd9AVtMmR7lbeVwms=; b=0UtLoTM/aZQGLSLzJJRsAYEDGam5o1c+KGS5WqJt6bbDtiHmiWvXRZ6JSp6myn+GyMfMkc 6FLsh2EaGNzIHFWf0wEAh8r6yCp4sn5Ghrpxh4wbiyi2amGhlYiIRRFg6+2sFPlJv8PHJw sPahOmLN7FtOeG/BWKu0nPQPbSnF2y6OyKiOBovsWV764cuVzs/IT1ZpVUg8O4GYvncOkR hAGixD/RKwR90/R7uBLTcR4NkfLwHJ3Z5HqJUDxJjCm8LpbFNRBVlBsI2fhdvKzmo7ls8m EQ7p/n5xkrNkRE1wZk0Qm7QnOkkVdS6wAs+uFULJUGbnO74uK4V4qCqnIy4K5g== From: "Thomas Perrot (Schneider Electric)" Date: Tue, 07 Jul 2026 10:01:31 +0200 Subject: [PATCH v7 5/5] watchdog: aaeon: Add watchdog driver for SRG-IMX8P MCU Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-Id: <20260707-dev-b4-aaeon-mcu-driver-v7-5-ca6c59abd672@bootlin.com> References: <20260707-dev-b4-aaeon-mcu-driver-v7-0-ca6c59abd672@bootlin.com> In-Reply-To: <20260707-dev-b4-aaeon-mcu-driver-v7-0-ca6c59abd672@bootlin.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Bartosz Golaszewski , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , =?utf-8?q?J=C3=A9r=C3=A9mie_Dautheribes?= , Wim Van Sebroeck , Guenter Roeck , Lee Jones Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Thomas Petazzoni , Miquel Raynal , "Thomas Perrot (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Add watchdog driver for the Aaeon SRG-IMX8P embedded controller. This driver provides system monitoring and recovery capabilities through the MCU's watchdog timer. The watchdog supports start, stop, and ping operations with a maximum hardware heartbeat of 25 seconds and a default timeout of 240 seconds. The software timeout can be changed via the WDIOC_SETTIMEOUT ioctl, the DT timeout-sec property, or the watchdog_timeout kernel boot parameter. Co-developed-by: Jérémie Dautheribes (Schneider Electric) Signed-off-by: Jérémie Dautheribes (Schneider Electric) Signed-off-by: Thomas Perrot (Schneider Electric) Acked-by: Guenter Roeck --- MAINTAINERS | 1 + drivers/watchdog/Kconfig | 10 +++ drivers/watchdog/Makefile | 1 + drivers/watchdog/aaeon_mcu_wdt.c | 167 +++++++++++++++++++++++++++++++++++++++ 4 files changed, 179 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 2538f8c4bc14..7b92af42c9fd 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -193,6 +193,7 @@ S: Maintained F: Documentation/devicetree/bindings/mfd/aaeon,srg-imx8p-mcu.yaml F: drivers/gpio/gpio-aaeon-mcu.c F: drivers/mfd/aaeon-mcu.c +F: drivers/watchdog/aaeon_mcu_wdt.c F: include/linux/mfd/aaeon-mcu.h AAEON UPBOARD FPGA MFD DRIVER diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index d3b9df7d466b..f67a0b453316 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -420,6 +420,16 @@ config SL28CPLD_WATCHDOG # ARM Architecture +config AAEON_MCU_WATCHDOG + tristate "Aaeon MCU Watchdog" + depends on MFD_AAEON_MCU + select WATCHDOG_CORE + help + Select this option to enable watchdog timer support for the Aaeon + SRG-IMX8P onboard microcontroller (MCU). This driver provides + watchdog functionality through the MCU, allowing system monitoring + and automatic recovery from system hangs. + config AIROHA_WATCHDOG tristate "Airoha EN7581 Watchdog" depends on ARCH_AIROHA || COMPILE_TEST diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index ba52099b1253..2deec425d3ea 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -37,6 +37,7 @@ obj-$(CONFIG_USBPCWATCHDOG) += pcwd_usb.o # ALPHA Architecture # ARM Architecture +obj-$(CONFIG_AAEON_MCU_WATCHDOG) += aaeon_mcu_wdt.o obj-$(CONFIG_ARM_SP805_WATCHDOG) += sp805_wdt.o obj-$(CONFIG_ARM_SBSA_WATCHDOG) += sbsa_gwdt.o obj-$(CONFIG_ARMADA_37XX_WATCHDOG) += armada_37xx_wdt.o diff --git a/drivers/watchdog/aaeon_mcu_wdt.c b/drivers/watchdog/aaeon_mcu_wdt.c new file mode 100644 index 000000000000..9ff559a69fd7 --- /dev/null +++ b/drivers/watchdog/aaeon_mcu_wdt.c @@ -0,0 +1,167 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Aaeon MCU Watchdog driver + * + * Copyright (C) 2026 Bootlin + * Author: Jérémie Dautheribes + * Author: Thomas Perrot + */ + +#include +#include +#include +#include +#include + +#define AAEON_MCU_PING_WDT 0x73 + +#define AAEON_MCU_WDT_TIMEOUT 240 +#define AAEON_MCU_WDT_HEARTBEAT_MS 25000 +#define AAEON_MCU_WDT_MIN_TIMEOUT 1 + +static unsigned int timeout; +module_param(timeout, uint, 0); +MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds"); + +struct aaeon_mcu_wdt { + struct watchdog_device wdt; + struct regmap *regmap; +}; + +static int aaeon_mcu_wdt_cmd(struct aaeon_mcu_wdt *data, u8 opcode, u8 arg) +{ + return regmap_write(data->regmap, AAEON_MCU_REG(opcode, arg), 0); +} + +static int aaeon_mcu_wdt_start(struct watchdog_device *wdt) +{ + struct aaeon_mcu_wdt *data = watchdog_get_drvdata(wdt); + + return aaeon_mcu_wdt_cmd(data, AAEON_MCU_CONTROL_WDT_OPCODE, 0x01); +} + +static int aaeon_mcu_wdt_status(struct watchdog_device *wdt, bool *enabled) +{ + struct aaeon_mcu_wdt *data = watchdog_get_drvdata(wdt); + unsigned int rsp; + int ret; + + ret = regmap_read(data->regmap, + AAEON_MCU_REG(AAEON_MCU_CONTROL_WDT_OPCODE, 0x02), + &rsp); + if (ret) + return ret; + + *enabled = rsp == 0x01; + return 0; +} + +static int aaeon_mcu_wdt_stop(struct watchdog_device *wdt) +{ + struct aaeon_mcu_wdt *data = watchdog_get_drvdata(wdt); + + return aaeon_mcu_wdt_cmd(data, AAEON_MCU_CONTROL_WDT_OPCODE, 0x00); +} + +static int aaeon_mcu_wdt_ping(struct watchdog_device *wdt) +{ + struct aaeon_mcu_wdt *data = watchdog_get_drvdata(wdt); + + return aaeon_mcu_wdt_cmd(data, AAEON_MCU_PING_WDT, 0x00); +} + +static const struct watchdog_info aaeon_mcu_wdt_info = { + .identity = "Aaeon MCU Watchdog", + .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT +}; + +static const struct watchdog_ops aaeon_mcu_wdt_ops = { + .owner = THIS_MODULE, + .start = aaeon_mcu_wdt_start, + .stop = aaeon_mcu_wdt_stop, + .ping = aaeon_mcu_wdt_ping, +}; + +static int aaeon_mcu_wdt_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct watchdog_device *wdt; + struct aaeon_mcu_wdt *data; + bool enabled; + int ret; + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->regmap = dev_get_regmap(dev->parent, NULL); + if (!data->regmap) + return -ENODEV; + + wdt = &data->wdt; + wdt->parent = dev; + wdt->info = &aaeon_mcu_wdt_info; + wdt->ops = &aaeon_mcu_wdt_ops; + /* + * The MCU firmware has a fixed hardware timeout of 25 seconds that + * cannot be changed. The watchdog core handles automatic pinging to + * support software timeouts longer than the hardware limit. The default + * software timeout of 240 seconds can be overridden via the DT + * timeout-sec property or the watchdog_timeout kernel boot parameter. + */ + wdt->timeout = AAEON_MCU_WDT_TIMEOUT; + wdt->min_timeout = AAEON_MCU_WDT_MIN_TIMEOUT; + wdt->max_hw_heartbeat_ms = AAEON_MCU_WDT_HEARTBEAT_MS; + watchdog_init_timeout(wdt, timeout, dev->parent); + + watchdog_set_drvdata(wdt, data); + watchdog_stop_on_reboot(wdt); + dev_set_drvdata(dev, wdt); + + ret = aaeon_mcu_wdt_status(wdt, &enabled); + if (ret) + return ret; + + if (enabled) + set_bit(WDOG_HW_RUNNING, &wdt->status); + + return devm_watchdog_register_device(dev, wdt); +} + +static int aaeon_mcu_wdt_suspend(struct device *dev) +{ + struct watchdog_device *wdt = dev_get_drvdata(dev); + + if (watchdog_active(wdt)) + return aaeon_mcu_wdt_stop(wdt); + + return 0; +} + +static int aaeon_mcu_wdt_resume(struct device *dev) +{ + struct watchdog_device *wdt = dev_get_drvdata(dev); + + if (watchdog_active(wdt)) + return aaeon_mcu_wdt_start(wdt); + + return 0; +} + +static DEFINE_SIMPLE_DEV_PM_OPS(aaeon_mcu_wdt_pm_ops, + aaeon_mcu_wdt_suspend, aaeon_mcu_wdt_resume); + +static struct platform_driver aaeon_mcu_wdt_driver = { + .driver = { + .name = "aaeon-mcu-wdt", + .pm = pm_sleep_ptr(&aaeon_mcu_wdt_pm_ops), + }, + .probe = aaeon_mcu_wdt_probe, +}; + +module_platform_driver(aaeon_mcu_wdt_driver); + +MODULE_ALIAS("platform:aaeon-mcu-wdt"); +MODULE_DESCRIPTION("Aaeon MCU Watchdog Driver"); +MODULE_AUTHOR("Jérémie Dautheribes "); +MODULE_LICENSE("GPL"); -- 2.55.0