From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5FAB23A3E96 for ; Wed, 8 Jul 2026 10:15:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783505752; cv=none; b=EqOB+JWTzelTLg68jJpchH3KeDMS0h3Aijgc031//LLfO8g4rSmmqst+4zuEX1xRmXPI3GPIy7siDXHo7qLcDLlwZmU1ZbCNMhYpPyUGtz/TGvOPqWGulktexMSF8F91o27+f0tK1BTcYGucfo0F60t2uww0ecxKark7vTr+Psw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783505752; c=relaxed/simple; bh=uMsD6FEMT4fz2ANAG1m3/bi6O+rr81eHSt9sCqU/PRg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=QgYOPeVPG8R89MAbPm2sPADwR8caSR9xXSyMd5pxBHCchfVBN6ziNNUOjZn+Vyug/ifDCikH1PRK8k2taV6jse2PnhPXfCxDcZ1lYwENsiXSaTuPpnu/c7x3deFICDfSrKm5a2uboE2sGrrnv3kFG+tdANuv/KG1uyrpWp/cfIc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=wOkDlcVl; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="wOkDlcVl" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id EEC324E40CF3; Wed, 8 Jul 2026 10:15:49 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id AB49060337; Wed, 8 Jul 2026 10:15:49 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 5568411BC3441; Wed, 8 Jul 2026 12:15:46 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1783505748; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=EKGSzFWOQ0pgQff5lX37PQfUpTYPDf3zSxLME5aZVNs=; b=wOkDlcVlrzIeZekN+Rr1aY0KnyT0yISevNhGNqeEDo4xeZSk8U5szWWykx26hxSM4zmOO9 4W+hSEF3MG79p49AxzMrl6Q4IOsx8KUB87fbAZn27W1bb5jC+DMSLUNRrrVZ5NZ7JnxmIf oNZZz7ud0Bf6s/LKrLoxYG7uYJrzKkZxcRfkOomRjqdqOv1HtKgSOoLW66iQ3kLgn5pnOm SOxqyTZbK9BTaU7s+Q/6s6qpx9G03KRfvCcGxQF260INxNoRZYx/mgg0Bb0Lbfz4QALfN/ /gccyOGjITQgmFHHct6cyxVhaQS356VRoJT5UAo7VRqbxGm8A1C+P058ZZ9RJg== From: Paul Louvel Date: Wed, 08 Jul 2026 12:15:14 +0200 Subject: [PATCH v2 01/10] soc: fsl: qe: Add chained_irq_{enter,exit}() calls in cascade handler Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260708-qe-pic-gpios-v2-1-1972044cfbd1@bootlin.com> References: <20260708-qe-pic-gpios-v2-0-1972044cfbd1@bootlin.com> In-Reply-To: <20260708-qe-pic-gpios-v2-0-1972044cfbd1@bootlin.com> To: Qiang Zhao , "Christophe Leroy (CS GROUP)" , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Bartosz Golaszewski , Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin Cc: linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, Paul Louvel , Herve Codina , stable@kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1783505738; l=1181; i=paul.louvel@bootlin.com; s=20260313; h=from:subject:message-id; bh=uMsD6FEMT4fz2ANAG1m3/bi6O+rr81eHSt9sCqU/PRg=; b=Oo/ytMkVc4RMpzD8Ct5wc9ZSu6LfQvEt/QNk4/iQG9C9hhfvqlv4fj7tjnPtYMgGaXhWU/SNi yrXEADV6AHADH5rmybjYIbAD8+K0+pPYc3VN/W3HOjEljoeBxbMbBWf X-Developer-Key: i=paul.louvel@bootlin.com; a=ed25519; pk=eLW50NT18UAvUT5cAcYf88zNbBCZDLFXuptpyLVhVIU= X-Last-TLS-Session-Version: TLSv1.3 Wrap the cascade handler body with chained_irq_{enter,exit}() to properly inform the parent IRQ chip that a chained interrupt is being serviced. Fixes: f0bcd784e1b76 ("soc: fsl: qe: Add an interrupt controller for QUICC Engine Ports") Signed-off-by: Paul Louvel Cc: stable@kernel.org --- drivers/soc/fsl/qe/qe_ports_ic.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/soc/fsl/qe/qe_ports_ic.c b/drivers/soc/fsl/qe/qe_ports_ic.c index 33ca1ddafe18..c3768c82a58c 100644 --- a/drivers/soc/fsl/qe/qe_ports_ic.c +++ b/drivers/soc/fsl/qe/qe_ports_ic.c @@ -6,6 +6,7 @@ */ #include +#include #include #include @@ -82,7 +83,13 @@ static int qepic_get_irq(struct irq_desc *desc) static void qepic_cascade(struct irq_desc *desc) { + struct irq_chip *chip = irq_desc_get_chip(desc); + + chained_irq_enter(chip, desc); + generic_handle_irq(qepic_get_irq(desc)); + + chained_irq_exit(chip, desc); } static int qepic_host_map(struct irq_domain *h, unsigned int virq, irq_hw_number_t hw) -- 2.55.0