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[95.248.227.210]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-47a9de1e785sm40674208f8f.8.2026.07.08.02.05.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jul 2026 02:05:39 -0700 (PDT) From: Christian Marangi To: Ryder Lee , Bjorn Helgaas , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Christian Marangi , linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/2] PCI: mediatek: handle optional reset for perstout for AN7583 Date: Wed, 8 Jul 2026 11:05:29 +0200 Message-ID: <20260708090533.19734-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260708090533.19734-1-ansuelsmth@gmail.com> References: <20260708090533.19734-1-ansuelsmth@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The Airoha AN7583 provide the perstout via a dedicated reset line as using the PCIe register is not possible as it will cause glitch. Add support for it via the additional reset name pcie-perstout[slot] and assert/deassert on an7583 specific startup. Signed-off-by: Christian Marangi --- drivers/pci/controller/pcie-mediatek.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c index 8b57c3d75b94..3d4de9d69407 100644 --- a/drivers/pci/controller/pcie-mediatek.c +++ b/drivers/pci/controller/pcie-mediatek.c @@ -175,6 +175,7 @@ struct mtk_pcie_soc { * @phys_base: Physical address of the I/O register base region * @list: port list * @pcie: pointer to PCIe host info + * @perstout_reset: pointer to port perstout reset control * @reset: pointer to port reset control * @sys_ck: pointer to transaction/data link layer clock * @ahb_ck: pointer to AHB slave interface operating clock for CSR access @@ -198,6 +199,7 @@ struct mtk_pcie_port { struct list_head list; struct mtk_pcie *pcie; struct reset_control *reset; + struct reset_control *perstout_reset; struct clk *sys_ck; struct clk *ahb_ck; struct clk *axi_ck; @@ -865,6 +867,9 @@ static int mtk_pcie_startup_port_an7583(struct mtk_pcie_port *port) size = lower_32_bits(resource_size(entry->res)); regmap_write(pbus_regmap, args[1], GENMASK(31, __fls(size))); + reset_control_assert(port->perstout_reset); + reset_control_deassert(port->perstout_reset); + return mtk_pcie_startup_port_v2(port); } @@ -1020,6 +1025,11 @@ static int mtk_pcie_parse_port(struct mtk_pcie *pcie, if (PTR_ERR(port->reset) == -EPROBE_DEFER) return PTR_ERR(port->reset); + snprintf(name, sizeof(name), "pcie-perstout%d", slot); + port->perstout_reset = devm_reset_control_get_optional_exclusive(dev, name); + if (PTR_ERR(port->perstout_reset) == -EPROBE_DEFER) + return PTR_ERR(port->perstout_reset); + /* some platforms may use default PHY setting */ snprintf(name, sizeof(name), "pcie-phy%d", slot); port->phy = devm_phy_optional_get(dev, name); -- 2.53.0