From: sashiko-bot@kernel.org
To: "Geert Uytterhoeven" <geert+renesas@glider.be>
Cc: wsa+renesas@sang-engineering.com, conor+dt@kernel.org,
robh@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v2 6/6] arm64: dts: renesas: r8a78000: Add MDLC nodes
Date: Wed, 08 Jul 2026 10:47:25 +0000 [thread overview]
Message-ID: <20260708104726.052F21F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <dca2c4940ba38b897f04b6fb67591de9835900e1.1783505142.git.geert+renesas@glider.be>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Hardware mapping mismatch between MDLC driver and DT causes probe failure for hscif0.
--
--- Patch [6]: [PATCH v2 6/6] arm64: dts: renesas: r8a78000: Add MDLC nodes ---
commit f3c8aa0f294cd575595329194a9adf5e14b5f350
Author: Geert Uytterhoeven <geert+renesas@glider.be>
arm64: dts: renesas: r8a78000: Add MDLC nodes
This patch adds device nodes for the Module Control (MDLC) blocks on the
R-Car X5H (R8A78000) SoC. It also links all (H)SCIF serial ports to an MDLC
for power domains and resets to complete their hardware description.
> diff --git a/arch/arm64/boot/dts/renesas/r8a78000.dtsi b/arch/arm64/boot/dts/renesas/r8a78000.dtsi
> index e22e307ce31fb..6ca1b1e95aef2 100644
> --- a/arch/arm64/boot/dts/renesas/r8a78000.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a78000.dtsi
[ ... ]
> @@ -886,6 +895,8 @@ hscif0: serial@c0710000 {
> <&cpg R8A78000_CPG_SGASYNCD4_PERW_BUS>,
> <&scif_clk>;
> clock-names = "fck", "brg_int", "scif_clk";
> + power-domains = <&mdlc_perw R8A78000_MDLC_PD_APL 0x41>;
[Severity: Medium]
Is this the correct ID for hscif0?
The r8a78000-mdlc driver introduced earlier in this series restricts power
domain attachment to module IDs in its allowlist.
The driver specifically defines ID 0x54 as HSCIF0.
Since 0x41 is not mapped to hscif0 in the driver's allowlist, will
r8a78000_mdlc_attach_dev() return -ENOENT and permanently prevent hscif0 from
successfully probing?
> + resets = <&mdlc_perw 0x41>;
> status = "disabled";
> };
[ ... ]
> @@ -922,6 +937,8 @@ hscif3: serial@c071c000 {
> <&cpg R8A78000_CPG_SGASYNCD4_PERW_BUS>,
> <&scif_clk>;
> clock-names = "fck", "brg_int", "scif_clk";
> + power-domains = <&mdlc_perw R8A78000_MDLC_PD_APL 0x54>;
[Severity: Medium]
Will this conflict with the MDLC driver?
The driver explicitly maps ID 0x54 to HSCIF0, but here it is being assigned to
hscif3.
> + resets = <&mdlc_perw 0x54>;
> status = "disabled";
> };
--
Sashiko AI review · https://sashiko.dev/#/patchset/cover.1783505142.git.geert+renesas@glider.be?part=6
next prev parent reply other threads:[~2026-07-08 10:47 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-08 10:15 [PATCH v2 0/6] R-Car X5H CPG/MDLC support Geert Uytterhoeven
2026-07-08 10:15 ` [PATCH v2 1/6] dt-bindings: clock: Document Renesas R-Car X5H Clock Pulse Generator Geert Uytterhoeven
2026-07-08 16:32 ` Conor Dooley
2026-07-08 10:15 ` [PATCH v2 2/6] dt-bindings: power: Document Renesas R-Car X5H Module Controller Geert Uytterhoeven
2026-07-08 12:38 ` Marek Vasut
2026-07-08 16:32 ` Conor Dooley
2026-07-08 10:15 ` [PATCH v2 3/6] clk: renesas: Add R-Car X5H CPG driver Geert Uytterhoeven
2026-07-08 10:24 ` sashiko-bot
2026-07-08 12:40 ` Marek Vasut
2026-07-09 9:49 ` Geert Uytterhoeven
2026-07-08 10:15 ` [PATCH v2 4/6] pmdomain: renesas: Add R-Car X5H MDLC driver Geert Uytterhoeven
2026-07-08 10:36 ` sashiko-bot
2026-07-08 12:47 ` Marek Vasut
2026-07-09 10:29 ` Geert Uytterhoeven
2026-07-08 10:15 ` [PATCH v2 5/6] arm64: dts: renesas: r8a78000: Add CPG node Geert Uytterhoeven
2026-07-08 12:51 ` Marek Vasut
2026-07-08 10:15 ` [PATCH v2 6/6] arm64: dts: renesas: r8a78000: Add MDLC nodes Geert Uytterhoeven
2026-07-08 10:47 ` sashiko-bot [this message]
2026-07-09 10:15 ` Geert Uytterhoeven
2026-07-08 13:07 ` Marek Vasut
2026-07-09 10:24 ` Geert Uytterhoeven
2026-07-09 11:24 ` Marek Vasut
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