Re: [PATCH v1 1/4] ASoC: dt-bindings: qcom: add LPASS LPR vote clock ID

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] The newly added clock ID LPASS_HW_LPR_VOTE is missing from the q6prm clock driver.
- [High] Q6DSP_MAX_CLK_ID is hardcoded to 104 in the driver, rejecting lookups for the new clock ID.
--

--- Patch [1]: [PATCH v1 1/4] ASoC: dt-bindings: qcom: add LPASS LPR vote clock ID ---
commit fe14afabf9a256155105b2b26aa6c17a00fb25dd
Author: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>

ASoC: dt-bindings: qcom: add LPASS LPR vote clock ID

Add a new clock ID, LPASS_HW_LPR_VOTE, to represent the LPASS low-power
resource (LPR) vote through the PRM interface. Also update Q6AFE_MAX_CLK_ID
to account for the newly added clock ID. This allows clients to explicitly
manage LPR resource voting via PRM.

> diff --git a/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h b/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h
> index 45850f2d43425..06ca2c287ab2f 100644
> --- a/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h
> +++ b/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h
> @@ -236,8 +236,9 @@
>  #define LPASS_HW_AVTIMER_VOTE		101
>  #define LPASS_HW_MACRO_VOTE		102
>  #define LPASS_HW_DCODEC_VOTE		103
> +#define LPASS_HW_LPR_VOTE		104

[Severity: High]
Is the corresponding driver implementation missing for this new clock ID?

Looking at the clock provider in sound/soc/qcom/qdsp6/q6prm-clocks.c, the
q6prm_clks array doesn't appear to have an entry for LPASS_HW_LPR_VOTE,
which means the clock would never be registered when a client device attempts
to request it.

[Severity: High]
Will the hardcoded limit in the driver reject lookups for this new ID?

In sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c, Q6DSP_MAX_CLK_ID is hardcoded
to 104. When a client device requests the new clock ID 104, it looks like it
would be rejected here:

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c:q6dsp_of_clk_hw_get() {
    ...
    if (idx >= Q6DSP_MAX_CLK_ID || attr > LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR) {
        ...
        return ERR_PTR(-EINVAL);
    }
    ...
}

Could this result in -EINVAL being returned instead of the expected clock?

Also, if the clock is later added to the initialization array without updating
the Q6DSP_MAX_CLK_ID macro, is there a risk of an out-of-bounds write during
driver initialization since the array size remains 104?

>  
> -#define Q6AFE_MAX_CLK_ID			104
> +#define Q6AFE_MAX_CLK_ID			105
>  
>  #define LPASS_CLK_ATTRIBUTE_INVALID		0x0
>  #define LPASS_CLK_ATTRIBUTE_COUPLE_NO		0x1

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260708114924.1069239-1-prasad.kumpatla@oss.qualcomm.com?part=1