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From: sashiko-bot@kernel.org
To: "Dawid Olesinski" <dawidro@gmail.com>
Cc: robh@kernel.org, devicetree@vger.kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v2 1/4] dt-bindings: crypto: rockchip: Add RK356x/RK3588 crypto engine binding
Date: Wed, 08 Jul 2026 18:13:32 +0000	[thread overview]
Message-ID: <20260708181332.CC13E1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260708175837.1718437-2-dawidro@gmail.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The YAML binding artificially restricts the `resets` property to a single item (`maxItems: 1`), which prevents the complete representation of the hardware's reset lines on both RK3568 and RK3588.
--

--- Patch [1]: [PATCH v2 1/4] dt-bindings: crypto: rockchip: Add RK356x/RK3588 crypto engine binding ---
commit d3ca14a283793e220819f2a5573b09896dfccc6d
Author: Dawid Olesinski <dawidro@gmail.com>

dt-bindings: crypto: rockchip: Add RK356x/RK3588 crypto engine binding

Add a YAML device tree binding for the Rockchip second-generation (V2)
cryptographic hardware accelerator present on the RK3568 and RK3588 SoCs.
The binding covers the rockchip,rk3568-crypto and rockchip,rk3588-crypto
compatible strings.

> diff --git a/Documentation/devicetree/bindings/crypto/rockchip,rk3588-crypto.yaml b/Documentation/devicetree/bindings/crypto/rockchip,rk3588-crypto.yaml
> new file mode 100644
> index 0000000000000..fc09f21b06549
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/crypto/rockchip,rk3588-crypto.yaml
[ ... ]
> +  clocks:
> +    items:
> +      - description: Core clock for the crypto IP internal logic
> +      - description: AXI interconnect clock interface
> +      - description: AHB interface clock
> +
> +  clock-names:
> +    items:
> +      - const: core
> +      - const: aclk
> +      - const: hclk
> +
> +  resets:
> +    maxItems: 1
> +
> +  reset-names:
> +    items:
> +      - const: core

[Severity: Medium]
Since the hardware block has AXI and AHB interfaces that require corresponding
clocks, should the binding also accommodate reset lines for AXI and AHB (e.g.,
SCMI_SRST_A_CRYPTO and SCMI_SRST_H_CRYPTO on the RK3588)?

Restricting resets to maxItems: 1 prevents a complete device tree node from
accurately describing the hardware's AXI and AHB resets alongside the core
reset, which would cause schema validation failures.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260708175837.1718437-1-dawidro@gmail.com?part=1

  reply	other threads:[~2026-07-08 18:13 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-08 17:58 [PATCH v2 0/4] crypto: rockchip: Add RK356x/RK3588 cryptographic offloader Dawid Olesinski
2026-07-08 17:58 ` [PATCH v2 1/4] dt-bindings: crypto: rockchip: Add RK356x/RK3588 crypto engine binding Dawid Olesinski
2026-07-08 18:13   ` sashiko-bot [this message]
2026-07-08 23:53   ` Sebastian Reichel
2026-07-08 17:58 ` [PATCH v2 2/4] crypto: rockchip: Add RK356x/RK3588 cryptographic offloader driver Dawid Olesinski
2026-07-08 18:13   ` sashiko-bot
2026-07-08 17:58 ` [PATCH v2 3/4] arm64: dts: rockchip: Add crypto node to rk356x-base Dawid Olesinski
2026-07-08 23:56   ` Sebastian Reichel
2026-07-09  7:07     ` Heiko Stübner
2026-07-10 14:30       ` Dawid Olesinski
2026-07-08 17:58 ` [PATCH v2 4/4] arm64: dts: rockchip: Add crypto node to rk3588-base Dawid Olesinski

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