Re: [PATCH v3 2/7] arm64: dts: mediatek: mt8173: Add and use UART AP_DMA controller

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The AP_DMA controller specifies `dma-requests = <8>` but only provides 6 `reg` and 6 `interrupts` entries, which causes the APDMA driver to fail during probe. Additionally, the patch omits DMA assignments for `uart0` despite the commit message claiming to configure all four UART controllers.
--

--- Patch [2]: [PATCH v3 2/7] arm64: dts: mediatek: mt8173: Add and use UART AP_DMA controller ---
commit ac8a25e005302375b885a8325819560714cb8e2c
Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

arm64: dts: mediatek: mt8173: Add and use UART AP_DMA controller

This commit adds the UART AP_DMA controller to the mt8173 device tree.
It also assigns DMA channels to the UART controllers to increase TX/RX
efficiency.

>     In order to increase the efficiency of data TX/RX over the UART
>     controllers, add the UART DMA controller and assign the right
>     channels to each of the four UART controllers.

[Severity: High]
The commit message mentions assigning channels to each of the four UART
controllers, but only uart1, uart2, and uart3 are updated in the patch. Is
uart0 intentionally missing?

> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
[ ... ]
> +		apdma: dma-controller@11000400 {
> +			compatible = "mediatek,mt8173-uart-dma", "mediatek,mt6577-uart-dma";
> +			reg = <0 0x11000400 0 0x80>, <0 0x11000480 0 0x80>,
> +			      <0 0x11000500 0 0x80>, <0 0x11000580 0 0x80>,
> +			      <0 0x11000600 0 0x80>, <0 0x11000680 0 0x80>;
> +			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>,
> +				     <GIC_SPI 98 IRQ_TYPE_LEVEL_LOW>,
> +				     <GIC_SPI 99 IRQ_TYPE_LEVEL_LOW>,
> +				     <GIC_SPI 100 IRQ_TYPE_LEVEL_LOW>,
> +				     <GIC_SPI 101 IRQ_TYPE_LEVEL_LOW>,
> +				     <GIC_SPI 102 IRQ_TYPE_LEVEL_LOW>;
> +			clocks = <&pericfg CLK_PERI_AP_DMA>;
> +			#dma-cells = <1>;
> +			dma-requests = <8>;

[Severity: High]
Does this dma-requests count of 8 match the provided reg and interrupts
arrays?

The mtk-uart-apdma driver iterates dma-requests times during probe. With only
6 resources defined in the reg and interrupts arrays,
devm_platform_ioremap_resource() will fail with -EINVAL when trying to map
the missing resources. This will cause the probe to abort, unconditionally
breaking DMA for all UARTs on this SoC.

Should dma-requests be 6 here since uart0 was omitted, or are there missing
reg and interrupts entries that should be added?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260709090924.27056-1-angelogioacchino.delregno@collabora.com?part=2