From: sashiko-bot@kernel.org
To: "AngeloGioacchino Del Regno" <angelogioacchino.delregno@collabora.com>
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org,
dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v3 08/11] drm/mediatek: mtk_dp: Move max link rate to SoC specific data
Date: Thu, 09 Jul 2026 10:47:41 +0000 [thread overview]
Message-ID: <20260709104742.5487A1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260709103431.46616-9-angelogioacchino.delregno@collabora.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
Pre-existing issues:
- [High] mtk_dp_bridge_mode_valid() uses the SoC's absolute maximum link rate for mode validation instead of the negotiated limit, leading to unsupportable display modes being accepted.
--
--- Patch [8]: [PATCH v3 08/11] drm/mediatek: mtk_dp: Move max link rate to SoC specific data ---
commit 47b5711a6d2bc56c41f2725702c27dbf19ea9ba4
Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
drm/mediatek: mtk_dp: Move max link rate to SoC specific data
This patch moves the maximum link rate to SoC specific data instead of
statically assigning it. This is in preparation for adding support for the
MT8196 eDP IP which supports a higher maximum link rate.
> diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c
> index cabfc833c0a80..ea90462b26f5e 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dp.c
[ ... ]
> @@ -1469,7 +1470,7 @@ static void mtk_dp_initialize_priv_data(struct mtk_dp *mtk_dp)
> {
> bool plugged_in = (mtk_dp->bridge.type == DRM_MODE_CONNECTOR_eDP);
>
> - mtk_dp->train_info.link_rate = DP_LINK_BW_5_4;
> + mtk_dp->train_info.link_rate = mtk_dp->data->hw_max_link_rate;
[Severity: High]
This is a pre-existing issue, but does setting mtk_dp->train_info.link_rate
to the SoC's absolute maximum bypass the board-level and sink limits during
mode validation?
In mtk_dp_bridge_mode_valid(), the available bandwidth is calculated using
the unbounded mtk_dp->train_info.link_rate:
u32 rate = drm_dp_bw_code_to_link_rate(mtk_dp->train_info.link_rate) *
lane_count_min;
Since mtk_dp_parse_capabilities() parses the sink's DPCD capabilities into
rx_cap but doesn't update train_info.link_rate, this bandwidth calculation
appears to ignore both the board-level limit (mtk_dp->max_linkrate) and the
sink's negotiated limit (rx_cap).
Because the actual link training will cap the rate to the limits, could this
cause mtk_dp_bridge_mode_valid() to erroneously accept unsupportable
high-bandwidth modes, resulting in display corruption or black screens when
those modes are sent over a lower-bandwidth trained link?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260709103431.46616-1-angelogioacchino.delregno@collabora.com?part=8
next prev parent reply other threads:[~2026-07-09 10:47 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-09 10:34 [PATCH v3 00/11] drm: MediaTek DisplayPort cleanups and MT8196 eDP AngeloGioacchino Del Regno
2026-07-09 10:34 ` [PATCH v3 01/11] dt-bindings: display: mediatek: dp: Deprecate nvmem efuse data AngeloGioacchino Del Regno
2026-07-09 10:34 ` [PATCH v3 02/11] dt-bindings: display: mediatek: dp: Add compatible for MT8196 eDP AngeloGioacchino Del Regno
2026-07-09 10:34 ` [PATCH v3 03/11] drm/mediatek: mtk_dp: Fix hdmi codec and phy driver unregistration AngeloGioacchino Del Regno
2026-07-09 10:46 ` sashiko-bot
2026-07-09 11:10 ` AngeloGioacchino Del Regno
2026-07-09 10:34 ` [PATCH v3 04/11] drm/mediatek: mtk_dp: Clarify SMC eDP/DP video unmute commands AngeloGioacchino Del Regno
2026-07-09 10:34 ` [PATCH v3 05/11] drm/mediatek: mtk_dp: Rework register offsets for proper PHY usage AngeloGioacchino Del Regno
2026-07-09 10:34 ` [PATCH v3 06/11] drm/mediatek: mtk_dp: Use PHY API for PHY power sequences AngeloGioacchino Del Regno
2026-07-09 11:00 ` sashiko-bot
2026-07-09 10:34 ` [PATCH v3 07/11] drm/mediatek: mtk_dp: Add support for PHY from devicetree AngeloGioacchino Del Regno
2026-07-09 10:55 ` sashiko-bot
2026-07-09 10:34 ` [PATCH v3 08/11] drm/mediatek: mtk_dp: Move max link rate to SoC specific data AngeloGioacchino Del Regno
2026-07-09 10:47 ` sashiko-bot [this message]
2026-07-09 10:34 ` [PATCH v3 09/11] drm/mediatek: mtk_dp: Add support for HotPlug Detection in DP AUX AngeloGioacchino Del Regno
2026-07-09 10:49 ` sashiko-bot
2026-07-09 10:34 ` [PATCH v3 10/11] drm/mediatek: mtk_dp: Add support for eDP1.5 IPs and MT8196 SoC AngeloGioacchino Del Regno
2026-07-09 10:51 ` sashiko-bot
2026-07-09 10:34 ` [PATCH v3 11/11] drm/mediatek: mtk_dp: Clarify XTAL freq and Debounce registers AngeloGioacchino Del Regno
2026-07-09 10:42 ` sashiko-bot
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