From: sashiko-bot@kernel.org
To: "Sebastian Reichel" <sebastian.reichel@collabora.com>
Cc: olteanv@gmail.com, neil.armstrong@linaro.org,
devicetree@vger.kernel.org, vkoul@kernel.org,
linux-phy@lists.infradead.org, robh@kernel.org,
conor+dt@kernel.org
Subject: Re: [PATCH v11 26/36] phy: rockchip: usbdp: Avoid xHCI SErrors
Date: Thu, 09 Jul 2026 19:28:09 +0000 [thread overview]
Message-ID: <20260709192809.695451F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260709-rockchip-usbdp-cleanup-v11-26-a149ac60f76c@collabora.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The USB3 port is unconditionally disabled before PHY re-initialization to avoid xHCI SErrors, but it is never re-enabled afterwards, permanently breaking USB3 functionality.
--
--- Patch [26]: [PATCH v11 26/36] phy: rockchip: usbdp: Avoid xHCI SErrors ---
commit 1f5e9aad179e51fb32f2117a4d8ff35248e145cc
Author: Sebastian Reichel <sebastian.reichel@collabora.com>
phy: rockchip: usbdp: Avoid xHCI SErrors
The USBDP PHY provides the PIPE clock to the USB3 controller, which means
the PHY must be fully running when anything tries to access the xHCI
registers. This patch avoids SErrors during re-initialization by disabling
the USB3 port beforehand, forcing the clock source to a safe fallback.
> diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c
> index edee27933d890..9e77513643a33 100644
> --- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
> +++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c
> @@ -1000,8 +1000,8 @@ static int rk_udphy_power_on(struct rk_udphy *udphy, u8 mode)
> rk_udphy_u3_port_disable(udphy, false);
> udphy->phy_needs_reinit = false;
> } else if (udphy->phy_needs_reinit) {
> - if (udphy->mode == UDPHY_MODE_DP)
> - rk_udphy_u3_port_disable(udphy, true);
> + rk_udphy_u3_port_disable(udphy, true);
> + udelay(10);
>
> ret = rk_udphy_init(udphy);
> if (ret)
[Severity: High]
Does this code permanently break the USB3 functionality?
We now unconditionally disable the USB3 port here before re-initializing the
PHY, but it appears there is no corresponding call to
rk_udphy_u3_port_disable(udphy, false) to re-enable it after rk_udphy_init()
completes.
Will this leave the DWC3 controller stuck on the UTMI fallback clock with
phystatus forced to 0, making the interface unusable after a mode switch?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260709-rockchip-usbdp-cleanup-v11-0-a149ac60f76c@collabora.com?part=26
next prev parent reply other threads:[~2026-07-09 19:28 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-09 19:02 [PATCH v11 00/36] phy: rockchip: usbdp: Clean up the mess Sebastian Reichel
2026-07-09 19:02 ` [PATCH v11 01/36] dt-bindings: phy: rockchip-usbdp: add improved ports scheme Sebastian Reichel
2026-07-09 19:02 ` [PATCH v11 02/36] phy: rockchip: usbdp: Update mode_change after error handling Sebastian Reichel
2026-07-09 19:20 ` sashiko-bot
2026-07-09 19:02 ` [PATCH v11 03/36] phy: rockchip: usbdp: Do not lose USB3 PHY status Sebastian Reichel
2026-07-09 19:19 ` sashiko-bot
2026-07-09 19:02 ` [PATCH v11 04/36] phy: rockchip: usbdp: Fix devm_clk_bulk_get_all check Sebastian Reichel
2026-07-09 19:02 ` [PATCH v11 05/36] phy: rockchip: usbdp: Handle missing clock-names DT property gracefully Sebastian Reichel
2026-07-09 19:02 ` [PATCH v11 06/36] phy: rockchip: usbdp: Drop seamless DP takeover Sebastian Reichel
2026-07-09 19:19 ` sashiko-bot
2026-07-09 19:02 ` [PATCH v11 07/36] phy: rockchip: usbdp: Keep clocks running on PHY re-init Sebastian Reichel
2026-07-09 19:18 ` sashiko-bot
2026-07-09 19:02 ` [PATCH v11 08/36] phy: rockchip: usbdp: Amend SSC modulation deviation Sebastian Reichel
2026-07-09 19:19 ` sashiko-bot
2026-07-09 19:02 ` [PATCH v11 09/36] phy: rockchip: usbdp: Fix LFPS detect threshold control Sebastian Reichel
2026-07-09 19:02 ` [PATCH v11 10/36] phy: rockchip: usbdp: Add missing mode_change update Sebastian Reichel
2026-07-09 19:19 ` sashiko-bot
2026-07-09 19:02 ` [PATCH v11 11/36] phy: rockchip: usbdp: Support single-lane DP Sebastian Reichel
2026-07-09 19:19 ` sashiko-bot
2026-07-09 19:02 ` [PATCH v11 12/36] phy: rockchip: usbdp: Limit DP lane count to muxed lanes Sebastian Reichel
2026-07-09 19:21 ` sashiko-bot
2026-07-09 19:02 ` [PATCH v11 13/36] phy: rockchip: usbdp: Rename DP lane functions Sebastian Reichel
2026-07-09 19:02 ` [PATCH v11 14/36] phy: rockchip: usbdp: Use FIELD_PREP_WM16_CONST Sebastian Reichel
2026-07-09 19:02 ` [PATCH v11 15/36] phy: rockchip: usbdp: Cleanup DP lane selection function Sebastian Reichel
2026-07-09 19:02 ` [PATCH v11 16/36] phy: rockchip: usbdp: Register DP aux bridge Sebastian Reichel
2026-07-09 19:02 ` [PATCH v11 17/36] phy: rockchip: usbdp: Drop DP HPD handling Sebastian Reichel
2026-07-09 19:23 ` sashiko-bot
2026-07-09 19:02 ` [PATCH v11 18/36] phy: rockchip: usbdp: Rename mode_change to phy_needs_reinit Sebastian Reichel
2026-07-09 19:02 ` [PATCH v11 19/36] phy: rockchip: usbdp: Re-init the PHY on orientation change Sebastian Reichel
2026-07-09 19:26 ` sashiko-bot
2026-07-09 19:02 ` [PATCH v11 20/36] phy: rockchip: usbdp: Factor out lane_mux_sel setup Sebastian Reichel
2026-07-09 19:02 ` [PATCH v11 21/36] phy: rockchip: usbdp: Properly handle TYPEC_STATE_SAFE and TYPEC_STATE_USB Sebastian Reichel
2026-07-09 19:27 ` sashiko-bot
2026-07-09 19:02 ` [PATCH v11 22/36] phy: rockchip: usbdp: Use guard functions for mutex Sebastian Reichel
2026-07-09 19:02 ` [PATCH v11 23/36] phy: rockchip: usbdp: Clear USB status on PHY exit Sebastian Reichel
2026-07-09 19:28 ` sashiko-bot
2026-07-09 19:02 ` [PATCH v11 24/36] phy: rockchip: usbdp: Hold mutex in DP PHY configure Sebastian Reichel
2026-07-09 19:02 ` [PATCH v11 25/36] phy: rockchip: usbdp: Add some extra debug messages Sebastian Reichel
2026-07-09 19:02 ` [PATCH v11 26/36] phy: rockchip: usbdp: Avoid xHCI SErrors Sebastian Reichel
2026-07-09 19:28 ` sashiko-bot [this message]
2026-07-09 19:02 ` [PATCH v11 27/36] phy: rockchip: usbdp: Handle rk_udphy_reset_deassert errors Sebastian Reichel
2026-07-09 19:02 ` [PATCH v11 28/36] phy: rockchip: usbdp: Only enable USB3 when not in high-speed mode Sebastian Reichel
2026-07-09 19:35 ` sashiko-bot
2026-07-09 19:02 ` [PATCH v11 29/36] phy: core: add notifier infrastructure Sebastian Reichel
2026-07-09 19:31 ` sashiko-bot
2026-07-09 19:02 ` [PATCH v11 30/36] usb: dwc3: core: support PHY reset notifications Sebastian Reichel
2026-07-09 19:02 ` [PATCH v11 31/36] phy: rockchip: usbdp: Add phy reset notification support Sebastian Reichel
2026-07-09 19:32 ` sashiko-bot
2026-07-09 19:02 ` [PATCH v11 32/36] phy: rockchip: usbdp: Drop -EPROBE_DEFER hack Sebastian Reichel
2026-07-09 19:34 ` sashiko-bot
2026-07-09 19:02 ` [PATCH v11 33/36] phy: rockchip: usbdp: Rename mode to hw_mode Sebastian Reichel
2026-07-09 19:35 ` sashiko-bot
2026-07-09 19:02 ` [PATCH v11 34/36] phy: rockchip: usbdp: Fix power state handling Sebastian Reichel
2026-07-09 19:02 ` [PATCH v11 35/36] phy: rockchip: usbdp: Re-init PHY on mux change Sebastian Reichel
2026-07-09 19:41 ` sashiko-bot
2026-07-09 19:02 ` [PATCH v11 36/36] phy: rockchip: usbdp: Add USB-C state without DP enabled Sebastian Reichel
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260709192809.695451F000E9@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=linux-phy@lists.infradead.org \
--cc=neil.armstrong@linaro.org \
--cc=olteanv@gmail.com \
--cc=robh@kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
--cc=sebastian.reichel@collabora.com \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox