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[82.64.236.198]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c15dfda815dsm265357966b.36.2026.07.10.02.57.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Jul 2026 02:57:38 -0700 (PDT) From: Loic Poulain Date: Fri, 10 Jul 2026 11:57:30 +0200 Subject: [PATCH v3 04/11] power: sequencing: pcie-m2: Report power controllability Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260710-monza-wireless-v3-4-46253587af64@oss.qualcomm.com> References: <20260710-monza-wireless-v3-0-46253587af64@oss.qualcomm.com> In-Reply-To: <20260710-monza-wireless-v3-0-46253587af64@oss.qualcomm.com> To: Manivannan Sadhasivam , Bartosz Golaszewski , Marcel Holtmann , Luiz Augusto von Dentz , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-pci@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-bluetooth@vger.kernel.org, devicetree@vger.kernel.org, Manivannan Sadhasivam , Loic Poulain X-Mailer: b4 0.14.2 X-Proofpoint-GUID: HpVXDjx7H-x1--FJ7Y7KMvQdtZ7kMct4 X-Proofpoint-ORIG-GUID: HpVXDjx7H-x1--FJ7Y7KMvQdtZ7kMct4 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzEwMDA5NyBTYWx0ZWRfX94nq9+qm2lCC phSv1UK4II0DFhyU77lAjFCmfjH9KePUav9/a06GXJ4vSuyUwcKX3IXQPVZRejcLmEar909Fl6a sj+lgSvFiQi/QvIQihuCMmQKtUKyd7M= X-Authority-Analysis: v=2.4 cv=funsol4f c=1 sm=1 tr=0 ts=6a50c214 cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=MDeckJw97qnk8wCBExTehA==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=ZbPLKLkBM29APCUVJXgA:9 a=QEXdDO2ut3YA:10 a=a_PwQJl-kcHnX1M80qC6:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzEwMDA5NyBTYWx0ZWRfX9GeqBu7H0STn ZiJsLD3GludaKQSQpGYXSx3Y2GmtqSS+KzotdeqWzKE3qyuI/daQyANCXiJhq4bXJGKr19D9YJl meeoqZ1IyUB+k0oYbNYQJWuDMrOwMHFYveYjb4KJoZH24zStq3oV9EpnRKOxQLdRGZNsJHFyl+M 7uGa4wqO7rH2ohEmv5yggscHZDwVVxZfyNs6+i/LjFf1YviEqmbRSAGXtp1FHSfkuXrp0uZCtFW pHczlNIMBl/AUkHR4MU6fdI/qXeiHojSxk5l/RsfZtk1i8lNfH9jFLAgG5TtgEwP2GBqZNaKzqd qbMNF1463AFawqUCMgxV6UnC/xLM4X+eWtZP+731qgwvgbBgOuXd7Sr2bbLZrRJP7Il1z5/iiEa T15bmynS9haWbn5FcXvfJPk/hSvurcOgjJ+YI4f4AogWquMg5mkw30Ep27VxHSnLRNqEya+Ns+h cbSnLpHroK5n0N4U78Q== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-10_02,2026-07-09_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 phishscore=0 clxscore=1015 lowpriorityscore=0 adultscore=0 bulkscore=0 suspectscore=0 malwarescore=0 priorityscore=1501 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607100097 The M.2 Key E connector gates its functions through the W_DISABLE1# (PCIe/WiFi) and W_DISABLE2# (Bluetooth) signals. When a signal is not routed to a host GPIO, the corresponding enable/disable callbacks are no-ops, so the host cannot gate that function's power on its own. Implement the per-unit .is_controllable() callback on the "uart-enable" and "pcie-enable" units so that consumers can query this per instance (based on the runtime presence of the W_DISABLE2#/W_DISABLE1# GPIOs) via pwrseq_power_is_controllable(). Signed-off-by: Loic Poulain --- drivers/power/sequencing/pwrseq-pcie-m2.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/power/sequencing/pwrseq-pcie-m2.c b/drivers/power/sequencing/pwrseq-pcie-m2.c index e3ba9169144dabbf0c553c0a4302c3b511fcaaa1..4bcd5078609da1be966ab30c73cffae5e578934f 100644 --- a/drivers/power/sequencing/pwrseq-pcie-m2.c +++ b/drivers/power/sequencing/pwrseq-pcie-m2.c @@ -84,11 +84,24 @@ static int pwrseq_pci_m2_e_uart_disable(struct pwrseq_device *pwrseq) return gpiod_set_value_cansleep(ctx->w_disable2_gpio, 1); } +static bool pwrseq_pci_m2_e_uart_is_controllable(struct pwrseq_device *pwrseq) +{ + struct pwrseq_pcie_m2_ctx *ctx = pwrseq_device_get_drvdata(pwrseq); + + /* + * The UART enable is driven through the W_DISABLE2# line. When it is not + * wired up on this connector the enable/disable callbacks are no-ops, so + * the host cannot gate the Bluetooth function on its own. + */ + return !!ctx->w_disable2_gpio; +} + static const struct pwrseq_unit_data pwrseq_pcie_m2_e_uart_unit_data = { .name = "uart-enable", .deps = pwrseq_pcie_m2_unit_deps, .enable = pwrseq_pci_m2_e_uart_enable, .disable = pwrseq_pci_m2_e_uart_disable, + .is_controllable = pwrseq_pci_m2_e_uart_is_controllable, }; static int pwrseq_pci_m2_e_pcie_enable(struct pwrseq_device *pwrseq) @@ -105,11 +118,24 @@ static int pwrseq_pci_m2_e_pcie_disable(struct pwrseq_device *pwrseq) return gpiod_set_value_cansleep(ctx->w_disable1_gpio, 1); } +static bool pwrseq_pci_m2_e_pcie_is_controllable(struct pwrseq_device *pwrseq) +{ + struct pwrseq_pcie_m2_ctx *ctx = pwrseq_device_get_drvdata(pwrseq); + + /* + * The PCIe/WiFi enable is driven through the W_DISABLE1# line. When it + * is not wired up on this connector the enable/disable callbacks are + * no-ops, so the host cannot gate the PCIe/WiFi function on its own. + */ + return !!ctx->w_disable1_gpio; +} + static const struct pwrseq_unit_data pwrseq_pcie_m2_e_pcie_unit_data = { .name = "pcie-enable", .deps = pwrseq_pcie_m2_unit_deps, .enable = pwrseq_pci_m2_e_pcie_enable, .disable = pwrseq_pci_m2_e_pcie_disable, + .is_controllable = pwrseq_pci_m2_e_pcie_is_controllable, }; static const struct pwrseq_unit_data pwrseq_pcie_m2_m_pcie_unit_data = { -- 2.34.1