Re: [PATCH v3 2/2] ARM: dts: aspeed: Add NVIDIA VR-NVL BMC

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] USB device OF properties placed inside `interface@1` subnodes for standalone CP2112 devices (`cp2112a`, `cp2112b`), rendering their GPIO and interrupt controller properties unreachable.
--

--- Patch [2]: [PATCH v3 2/2] ARM: dts: aspeed: Add NVIDIA VR-NVL BMC ---
commit a3630d8ce64970cdc226cd47ccf45d81782d9cf0
Author: Jacky Huang <jackyhuang@nvidia.com>

ARM: dts: aspeed: Add NVIDIA VR-NVL BMC

Add the device tree for the Aspeed AST2600 BMC for NVIDIA's Vera
Rubin NVL compute platform.

Link: https://lore.kernel.org/all/20260629105202.1417679-1-jackyhuang@nvidia.com/

> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-vr-nvl-bmc.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-vr-nvl-bmc.dts
> new file mode 100644
> index 0000000000000..197f6c5a95fe0
> --- /dev/null
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-vr-nvl-bmc.dts
> @@ -0,0 +1,901 @@

[ ... ]

> +				device@1 {
> +					reg = <1>;
> +					#address-cells = <2>;
> +					#size-cells = <0>;
> +
> +					cp2112a: interface@1 {
> +						reg = <1 1>;
> +						gpio-controller;
> +						#gpio-cells = <2>;
> +						interrupt-controller;
> +						#interrupt-cells = <2>;
> +					};
> +				};

[Severity: Medium]
Will these OF properties be ignored by the kernel?

Since the CP2112 is a single-interface USB device, the USB OF core
uses a combined node and assigns the parent device@1 node as the of_node for
the interface device. This means child interface nodes are ignored.

Additionally, the DT specifies reg = <1 1> (interface 1), but the CP2112
only has interface 0.

Should these properties be placed directly in the device node instead?

[ ... ]

> +				device@1 {
> +					reg = <1>;
> +					#address-cells = <2>;
> +					#size-cells = <0>;
> +
> +					cp2112b: interface@1 {
> +						reg = <1 1>;
> +						gpio-controller;
> +						#gpio-cells = <2>;
> +						interrupt-controller;
> +						#interrupt-cells = <2>;
> +					};
> +				};

[Severity: Medium]
Will these properties also be ignored for the same reason as cp2112a?

Should these properties be placed directly in the device node instead?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260710054849.3178747-1-jackyhuang@nvidia.com?part=2