Re: [PATCH v3 2/3] riscv: dts: sophgo: cv180x: Add PWR_GPIO controller

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The newly added `gpio@5021000` node is inserted out of numerical order with respect to its unit-address.
--

--- Patch [2]: [PATCH v3 2/3] riscv: dts: sophgo: cv180x: Add PWR_GPIO controller ---
commit 141d632bdcf67218645f5def2ac6d6cba75ba5ef
Author: Chen-Yu Yeh <chenyou910331@gmail.com>

riscv: dts: sophgo: cv180x: Add PWR_GPIO controller

This commit adds the PWR_GPIO controller node to the CV180x/CV181x device tree.
The controller is an additional DesignWare APB GPIO controller located in the
always-on power domain.

> diff --git a/arch/riscv/boot/dts/sophgo/cv180x.dtsi b/arch/riscv/boot/dts/sophgo/cv180x.dtsi
> index 06b0ce5a2db7a..25ad2bd265d76 100644
> --- a/arch/riscv/boot/dts/sophgo/cv180x.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv180x.dtsi
> @@ -160,6 +160,24 @@ portd: gpio-controller@0 {
>  			};
>  		};
>  
> +		gpio4: gpio@5021000 {

[Severity: Low]
This isn't a bug, but should this node be sorted by its unit address?

It appears that gpio@5021000 is placed right before adc@30f0000, which breaks
the standard convention of sorting device tree nodes numerically by their unit
address.

> +			compatible = "snps,dw-apb-gpio";
> +			reg = <0x5021000 0x1000>;

[ ... ]

> +		};
> +
>  		saradc: adc@30f0000 {

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Sashiko AI review · https://sashiko.dev/#/patchset/20260710075917.159969-1-chenyou910331@gmail.com?part=2